Re: [PATCH 0/3] perf, amd: Support for Family 16h L2I Performance Counters

[Jacob Shin <jacob.shin@amd.com>]

On Wed, Mar 27, 2013 at 06:07:01PM -0500, Jacob Shin wrote:
> Upcoming AMD Family 16h Processors provide 4 new performance counters
> to count L2 related events. Similar to northbridge counters, these new
> counters are shared across multiple CPUs that share the same L2 cache.
> This patchset adds support for these new counters and enforces sharing
> by leveraging the existing sharing logic used for the northbridge
> counters.

Ingo, please consider commiting to perf/core for 3.10. This patchset
is very similar to our northbridge counter support that went into 3.9:
https://lkml.org/lkml/2013/2/18/81

This series adds support for yet another set of new counters.

Thank you,

> 
> Jacob Shin (3):
>   perf, amd: Further generalize NB event constraints handling logic
>   perf, x86: Allow for multiple kfree_on_online pointers
>   perf, amd: Enable L2I performance counters on AMD Family 16h
> 
>  arch/x86/include/asm/cpufeature.h      |    2 +
>  arch/x86/include/asm/perf_event.h      |    4 +
>  arch/x86/include/uapi/asm/msr-index.h  |    4 +
>  arch/x86/kernel/cpu/perf_event.c       |    7 +-
>  arch/x86/kernel/cpu/perf_event.h       |   11 +-
>  arch/x86/kernel/cpu/perf_event_amd.c   |  227 +++++++++++++++++++++++++-------
>  arch/x86/kernel/cpu/perf_event_intel.c |    2 +-
>  7 files changed, 199 insertions(+), 58 deletions(-)
> 
> -- 
> 1.7.9.5
>