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From: Peter Zijlstra <peterz@infradead.org>
To: Robert Richter <rric@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>, Josh Boyer <jwboyer@redhat.com>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@ghostprotocols.net>,
	x86@kernel.org, linux-kernel@vger.kernel.org, gleb@redhat.com
Subject: Re: Drop WARN on AMD lack of perfctrs
Date: Fri, 17 May 2013 12:57:30 +0200	[thread overview]
Message-ID: <20130517105730.GD5162@dyad.programming.kicks-ass.net> (raw)
In-Reply-To: <20130517103600.GG8356@rric.localhost>


So what about something like the below?

---
 arch/x86/kernel/cpu/perf_event_amd.c | 26 ++++++++++----------------
 1 file changed, 10 insertions(+), 16 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 7e28d94..87e8a7e 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -648,24 +648,19 @@ static __initconst const struct x86_pmu amd_pmu = {
 	.cpu_dead		= amd_pmu_cpu_dead,
 };
 
-static int setup_event_constraints(void)
+__init int amd_core_pmu_init(void)
 {
-	if (boot_cpu_data.x86 == 0x15)
+	switch (boot_cpu_data.x86) {
+	case 0x15:
+		pr_cont("Fam15h ");
 		x86_pmu.get_event_constraints = amd_get_event_constraints_f15h;
-	return 0;
-}
+		break;
 
-static int setup_perfctr_core(void)
-{
-	if (!cpu_has_perfctr_core) {
-		WARN(x86_pmu.get_event_constraints == amd_get_event_constraints_f15h,
-		     KERN_ERR "Odd, counter constraints enabled but no core perfctrs detected!");
+	default:
+		pr_err("core perfctr but no constraints; unknown hardware!\n");
 		return -ENODEV;
 	}
 
-	WARN(x86_pmu.get_event_constraints == amd_get_event_constraints,
-	     KERN_ERR "hw perf events core counters need constraints handler!");
-
 	/*
 	 * If core performance counter extensions exists, we must use
 	 * MSR_F15H_PERF_CTL/MSR_F15H_PERF_CTR msrs. See also
@@ -675,8 +670,7 @@ static int setup_perfctr_core(void)
 	x86_pmu.perfctr		= MSR_F15H_PERF_CTR;
 	x86_pmu.num_counters	= AMD64_NUM_COUNTERS_CORE;
 
-	printk(KERN_INFO "perf: AMD core performance counters detected\n");
-
+	pr_cont("core perfctr, ");
 	return 0;
 }
 
@@ -688,8 +682,8 @@ __init int amd_pmu_init(void)
 
 	x86_pmu = amd_pmu;
 
-	setup_event_constraints();
-	setup_perfctr_core();
+	if (cpu_has_perfctr_core && amd_core_pmu_init())
+		return -ENODEV;
 
 	/* Events are common for all AMDs */
 	memcpy(hw_cache_event_ids, amd_hw_cache_event_ids,


  reply	other threads:[~2013-05-17 10:59 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-16 15:10 Josh Boyer
2013-05-16 17:51 ` Peter Zijlstra
2013-05-16 17:55   ` Josh Boyer
2013-05-16 18:10     ` Peter Zijlstra
2013-05-16 20:55       ` Robert Richter
2013-05-16 21:34         ` Borislav Petkov
2013-05-17  9:04           ` Peter Zijlstra
2013-05-17  9:16             ` Borislav Petkov
2013-05-17  9:27               ` Peter Zijlstra
2013-05-17  9:45                 ` Borislav Petkov
2013-05-17 10:36                   ` Robert Richter
2013-05-17 10:57                     ` Peter Zijlstra [this message]
2013-05-21  8:56                       ` Robert Richter
2013-05-21 11:05                         ` Peter Zijlstra
2013-05-21 13:58                           ` Robert Richter
2013-05-21 15:20                           ` Jacob Shin
2013-05-28 13:03                           ` [tip:perf/core] perf/x86/amd: Rework AMD PMU init code tip-bot for Peter Zijlstra
2013-05-16 21:54         ` Drop WARN on AMD lack of perfctrs Josh Boyer
2013-05-16 22:33           ` Robert Richter
2013-05-16 19:31   ` Gleb Natapov
2013-05-16 20:00     ` Borislav Petkov

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