From: Russell King - ARM Linux <linux@arm.linux.org.uk>
To: "Yang, Wenyou" <Wenyou.Yang@atmel.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"plagnioj@jcrosoft.com" <plagnioj@jcrosoft.com>,
"Ferre, Nicolas" <Nicolas.FERRE@atmel.com>,
"linux@maxim.org.za" <linux@maxim.org.za>
Subject: Re: [PATCH] ARM: at91: Fix: Change internal SRAM memory type to "MT_MEMORY_SO"
Date: Fri, 24 May 2013 12:20:29 +0100 [thread overview]
Message-ID: <20130524112029.GW18614@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <B256D81BAE5131468A838E5D7A243641687BB93C@penmbx01>
On Fri, May 24, 2013 at 07:11:04AM +0000, Yang, Wenyou wrote:
> The story is: for sama5d3x with Cortex-A5 core, if not so, when copying
> code snippet to the internal SRAM, then jump to run this code, but fail
> to run.
And that is where your mistake is - you forgot that you're working with
a CPU with harvard caches which will require some cache maintanence
between copying the code and executing it.
You want to look at flush_icache_range() rather than making this memory
strongly ordered.
next prev parent reply other threads:[~2013-05-24 11:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-20 1:05 [PATCH] " Wenyou Yang
2013-05-20 1:06 ` [PATCH] ARM: at91: Fix: " Wenyou Yang
2013-05-21 9:06 ` Nicolas Ferre
2013-05-22 0:14 ` Russell King - ARM Linux
2013-05-24 7:11 ` Yang, Wenyou
2013-05-24 11:20 ` Russell King - ARM Linux [this message]
2013-05-24 14:03 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-24 16:40 ` Russell King - ARM Linux
2013-05-24 16:52 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-24 16:59 ` Russell King - ARM Linux
2013-05-24 17:11 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-21 9:06 ` [PATCH] " Nicolas Ferre
2013-06-08 2:17 ` [PATCH] Change the internal SRAM memory type MT_MEMORY_NONCACHED Wenyou Yang
2013-06-13 13:19 ` Nicolas Ferre
2013-06-13 13:43 ` Russell King - ARM Linux
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