From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753728Ab3F0RAr (ORCPT ); Thu, 27 Jun 2013 13:00:47 -0400 Received: from mail.active-venture.com ([67.228.131.205]:58956 "EHLO mail.active-venture.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752018Ab3F0RAp (ORCPT ); Thu, 27 Jun 2013 13:00:45 -0400 X-Originating-IP: 108.223.40.66 Date: Thu, 27 Jun 2013 10:00:52 -0700 From: Guenter Roeck To: "Michael S. Tsirkin" Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Greg Kroah-Hartman , "Hans J. Koch" , Rob Landley , linux-doc@vger.kernel.org Subject: Re: [RFC PATCH] uio: uio_pci_generic: Add support for MSI interrupts Message-ID: <20130627170052.GA9646@roeck-us.net> References: <1372285823-6293-1-git-send-email-linux@roeck-us.net> <20130627074501.GC5489@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20130627074501.GC5489@redhat.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 27, 2013 at 10:45:01AM +0300, Michael S. Tsirkin wrote: > On Wed, Jun 26, 2013 at 03:30:23PM -0700, Guenter Roeck wrote: > > Enable support for MSI interrupts if the device supports it. > > Since MSI interrupts are edge triggered, it is no longer necessary to > > disable interrupts in the kernel and re-enable them from user-space. > > Instead, clearing the interrupt condition in the user space application > > automatically re-enables the interrupt. > > > > Signed-off-by: Guenter Roeck > > --- > > An open question is if we can just do this unconditionally > > or if there should be some flag to enable it. A module parameter, maybe ? > > NACK > > UIO is for devices that don't do memory writes. > Anything that can do writes must be protected by an IOMMU > and/or have a secure kernel driver, not a UIO stub. > > MSI is done by memory writes so if userspace > controls the device it can trick it to write > anywhere in memory. > Just out of curiosity: Since MSI support is mandatory for all PCIE devices, isn't that possible anyway, even if MSI is not enabled by the kernel ? All one would need to do is to enable MSI from user space; after all, the chip configuration space is writable. Thanks, Guenter