From: Peter Zijlstra <peterz@infradead.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: "Yan, Zheng" <zheng.z.yan@intel.com>,
linux-kernel@vger.kernel.org, mingo@kernel.org,
eranian@google.com
Subject: Re: [PATCH v2 4/7] perf, x86: Save/resotre LBR stack during context switch
Date: Thu, 4 Jul 2013 16:00:57 +0200 [thread overview]
Message-ID: <20130704140057.GN18898@dyad.programming.kicks-ass.net> (raw)
In-Reply-To: <20130704134457.GS6123@two.firstfloor.org>
On Thu, Jul 04, 2013 at 03:44:57PM +0200, Andi Kleen wrote:
> Evidently it's not read-only on Haswell at least.
It would be ever so good if you could at least test run such patches against
semi-current chips, not only the very latest.
> And if we don't restore the TOS it can be completely wrong, and
> the stack state would corrupt.
How so? You could simply write into idx := (tos + i) % nr_lbr ?
> The LBR stack is quite sensitive to any corruption of the state,
> that is different from other LBR uses.
>
> I suppose the wrmsr could be made checking to catch any potential
> failure. But normally Intel CPUs are quite consistent in things
> like that.
Please verify with the appropriate hardware teams and update the SDM
accordingly. This code is used with all Intel CPUs that have LBR support, which
is pretty much all of them except Yonah.
Using a checking wmsr isn't really a nice option; esp as this is in a somewhat
time critical path.
next prev parent reply other threads:[~2013-07-04 14:01 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-01 7:23 [PATCH v2 0/7] perf, x86: Haswell LBR call stack support Yan, Zheng
2013-07-01 7:23 ` [PATCH v2 1/7] perf, x86: Reduce lbr_sel_map size Yan, Zheng
2013-07-01 7:23 ` [PATCH v2 2/7] perf, x86: Basic Haswell LBR call stack support Yan, Zheng
2013-07-01 7:23 ` [PATCH v2 3/7] perf, x86: Introduce x86 special perf event context Yan, Zheng
2013-07-04 12:41 ` Peter Zijlstra
2013-07-05 3:19 ` Yan, Zheng
2013-07-05 12:45 ` Peter Zijlstra
2013-07-08 8:51 ` Yan, Zheng
2013-07-01 7:23 ` [PATCH v2 4/7] perf, x86: Save/resotre LBR stack during context switch Yan, Zheng
2013-07-04 9:57 ` Peter Zijlstra
2013-07-04 11:39 ` Yan, Zheng
2013-07-04 13:44 ` Andi Kleen
2013-07-04 14:00 ` Peter Zijlstra [this message]
2013-07-10 17:57 ` Andi Kleen
2013-07-04 12:44 ` Peter Zijlstra
2013-07-04 12:45 ` Peter Zijlstra
2013-07-05 5:36 ` Yan, Zheng
2013-07-05 8:15 ` Peter Zijlstra
2013-07-05 8:51 ` Yan, Zheng
2013-07-05 12:31 ` Peter Zijlstra
2013-08-08 6:18 ` Yan, Zheng
2013-07-01 7:23 ` [PATCH v2 5/7] perf, core: Pass perf_sample_data to perf_callchain() Yan, Zheng
2013-07-01 7:23 ` [PATCH v2 6/7] perf, x86: Use LBR call stack to get user callchain Yan, Zheng
2013-07-01 7:23 ` [PATCH v2 7/7] perf, x86: Discard zero length call entries in LBR call stack Yan, Zheng
-- strict thread matches above, loose matches on Subject: below --
2012-10-24 5:59 [PATCH V2 0/7] perf, x86: Haswell LBR call stack support Yan, Zheng
2012-10-24 5:59 ` [PATCH V2 4/7] perf, x86: Save/resotre LBR stack during context switch Yan, Zheng
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