From: Borislav Petkov <bp@alien8.de>
To: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
Cc: Prarit Bhargava <prarit@redhat.com>,
linux-kernel@vger.kernel.org, tigran@aivazian.fsnet.co.uk,
x86@kernel.org, andi@firstfloor.org
Subject: Re: [PATCH] x86, microcode, Fix long microcode load time when firmware file is missing [v2]
Date: Mon, 28 Oct 2013 16:23:14 +0100 [thread overview]
Message-ID: <20131028152314.GN4314@pd.tnic> (raw)
In-Reply-To: <20131028150656.GA15440@khazad-dum.debian.net>
On Mon, Oct 28, 2013 at 01:06:56PM -0200, Henrique de Moraes Holschuh wrote:
> AMD can get away with a half-done implementation of negative caching
> (or an "optimised one" depending on your PoV :) ) because they have
> per-family firmware files, so even mixed-stepping systems will require
> only the same file. This is *not* true for Intel, which is really
> annoying.
Not per family but per-a-couple-of-families and starting with F15h we
did a separate container because of some obscure reason we had to dance
around at the time.
But per-family is enough because I hardly doubt any x86 vendor
would do mixed-setups of CPUs from different families. It is called
mixed-steppings for a reason: you can mix the same family and model CPUs
but with different steppings. And I think AMD had a K8 system which
sported that.
Mixing different families (and models for that matter) would be pretty
PITA and you're better off simply buying a bunch of identical CPUs :-)
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
--
next prev parent reply other threads:[~2013-10-28 15:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-28 12:06 Prarit Bhargava
2013-10-28 14:37 ` Borislav Petkov
2013-10-28 15:06 ` Henrique de Moraes Holschuh
2013-10-28 15:11 ` Prarit Bhargava
2013-10-28 15:23 ` Borislav Petkov [this message]
2013-10-28 15:05 ` Takashi Iwai
2013-10-28 15:12 ` Prarit Bhargava
2013-10-31 15:23 ` Prarit Bhargava
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