From: Mark Brown <broonie@kernel.org>
To: Daniel Matuschek <daniel@matuschek.net>
Cc: alsa-devel@alsa-project.org,
Dimitris.Papastamos@wolfsonmicro.com, lgirdwood@gmail.com,
perex@perex.cz, tiwai@suse.de,
patches@opensource.wolfsonmicro.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ASoC: wm8804: Allow control of master clock divider in PLL generation
Date: Fri, 17 Jan 2014 00:54:37 +0000 [thread overview]
Message-ID: <20140117005437.GQ17314@sirena.org.uk> (raw)
In-Reply-To: <alpine.DEB.2.02.1401142030110.23472@parallels-Parallels-Virtual-Platform>
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On Tue, Jan 14, 2014 at 08:34:10PM +0100, Daniel Matuschek wrote:
> WM8804 can run with PLL frequencies of 256xfs and 128xfs for
> most sample rates. At 192kHz only 128xfs is supported. The
> existing driver selects 128xfs automatically for some lower
Charles (or someone else from Wolfson), you commented on previous
versions of this - are you still OK with it?
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next prev parent reply other threads:[~2014-01-17 0:55 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-14 19:34 Daniel Matuschek
2014-01-17 0:54 ` Mark Brown [this message]
2014-01-17 10:35 ` Dimitris Papastamos
2014-01-22 11:40 ` [alsa-devel] " Ben Dooks
2014-01-17 9:48 ` Charles Keepax
2014-01-17 12:22 ` Mark Brown
2014-01-20 20:03 ` [alsa-devel] " Daniel Matuschek
2014-01-17 16:43 ` Florian Meier
2014-01-17 17:59 ` Mark Brown
2014-01-17 18:26 ` Daniel Matuschek
[not found] ` <52D97120.8030606@koalo.de>
[not found] ` <20140117183332.GC17314@sirena.org.uk>
2014-01-17 18:44 ` Florian Meier
2014-01-17 18:47 ` Mark Brown
-- strict thread matches above, loose matches on Subject: below --
2014-01-12 21:11 Daniel Matuschek
2014-01-13 9:21 ` Florian Meier
2014-01-13 11:14 ` Charles Keepax
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