From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Mike Turquette <mturquette@linaro.org>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>,
"swarren@wwwdotorg.org" <swarren@wwwdotorg.org>,
"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
"rob.herring@calxeda.com" <rob.herring@calxeda.com>,
"pawel.moll@arm.com" <pawel.moll@arm.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>
Subject: Re: Tegra clockframework fixes for 3.14
Date: Mon, 24 Feb 2014 15:43:19 +0200 [thread overview]
Message-ID: <20140224134319.GG19389@tbergstrom-lnx.Nvidia.com> (raw)
In-Reply-To: <20140224010211.22529.99924@quantum>
On Mon, Feb 24, 2014 at 02:02:11AM +0100, Mike Turquette wrote:
> Quoting Peter De Schrijver (2014-02-20 09:27:44)
> > Hi Mike,
> >
> > Could you merge these fixes still for 3.14?
>
> No problem, but can you provide a list of the regressions fixed? I'll
> add those to my merge commit message. No need for you to respin
> anything. Next time if you could submit a signed tag with the
> regressions listed in the message it would be a great help.
>
This fixes the following issues:
clk: tegra124: remove gr2d and gr3d clocks - accesses to undefined registers
clk: tegra: Fix vic03 mux index - wrong parent when PLLC3 is selected (because clk_m is actually selected)
clk: tegra: use max divider if divider overflows - make tegra fractional divider match the clk-div.c behaviour
clk: tegra: cclk_lp has a pllx/2 divider - pllx runs at half the programmed rate
clk: tegra: fix sdmmc clks on Tegra1x4 - wrong parent selection
clk: tegra: fix host1x clock on Tegra124 - wrong parent selection
clk: tegra: PLLD2 fixes for hdmi - PLL runs at wrong rate
clk: tegra: Fix PLLD mnp table - PLL runs at wrong rate
clk: tegra: Fix PLLP rate table - kernel panic when using coreboot
clk: tegra: Correct clock number for UARTE - wrong clock when using UARTE
clk: tegra: Add missing Tegra20 fuse clks - fuse driver broken
Cheers,
Peter.
next prev parent reply other threads:[~2014-02-24 13:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-20 17:27 Peter De Schrijver
[not found] ` <20140224010211.22529.99924@quantum>
2014-02-24 13:43 ` Peter De Schrijver [this message]
2014-02-26 10:16 ` Peter De Schrijver
[not found] ` <20140226153942.22529.95697@quantum>
2014-02-27 9:22 ` Peter De Schrijver
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