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Date: Thu, 6 Mar 2014 18:22:17 +0100
From: Jiri Olsa <jolsa@redhat.com>
To: Will Deacon <will.deacon@arm.com>
Cc: Jean Pihet <jean.pihet@linaro.org>,
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Subject: Re: [PATCH 1/3] perf tests: Introduce perf_regs_load function on ARM
Message-ID: <20140306172217.GB1269@krava.brq.redhat.com>
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On Thu, Mar 06, 2014 at 11:33:15AM +0000, Will Deacon wrote:
> On Wed, Mar 05, 2014 at 02:17:00AM +0000, Jean Pihet wrote:
> > On 4 March 2014 12:00, Will Deacon <will.deacon@arm.com> wrote:
> > > On Mon, Mar 03, 2014 at 09:53:21AM +0000, Jean Pihet wrote:
> > >> +     str lr, [r0, #PC]       @ Save caller PC
> > >
> > > This isn't necessarily the `caller PC' (depending on how you define it).
> > > It's the return address, which is probably (but not always) the instruction
> > > following the branch to this function.
> > Agreed. However the perf test code expects a registers buffer filled
> > in with the caller's values.
> > I can change the comment here, is that needed?
> 
> It depends what the perf test code really expects. At the moment, you're not
> providing it with anything consistent which doesn't sound correct.

the code expects caller's PC. That is what the x86 test code
expects from perf_regs_load. We take the return IP saved by
call instruction:

ENTRY(perf_regs_load)
	...
	movq 0(%rsp), %rax
	movq %rax, IP(%rdi)
	...

jirka