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From: "Liviu Dudau" <liviu@dudau.co.uk>
To: Kumar Gala <galak@codeaurora.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Marek Vasut <marex@denx.de>,
	arnd@arndb.de, tony@atomide.com, Mohit Kumar <mohit.kumar@st.com>,
	jg1.han@samsung.com,
	Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH v2 03/18] PCI: designware: Configuration space should be specified in 'reg'
Date: Thu, 29 May 2014 16:18:40 +0100	[thread overview]
Message-ID: <20140529151840.GD1677@bart.dudau.co.uk> (raw)
In-Reply-To: <98E18225-3C63-4106-901A-A5D3DEC268C8@codeaurora.org>

On Thu, May 29, 2014 at 10:03:54AM -0500, Kumar Gala wrote:
> 
> On May 29, 2014, at 1:38 AM, Kishon Vijay Abraham I <kishon@ti.com> wrote:
> 
> > The configuration address space has so far been specified in *ranges*,
> > however it should be specified in *reg* making it a platform MEM resource.
> > Hence used 'platform_get_resource_*' API to get configuration address
> > space in the designware driver.
> > 
> > Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Mohit Kumar <mohit.kumar@st.com>
> > Cc: Jingoo Han <jg1.han@samsung.com>
> > Cc: Marek Vasut <marex@denx.de>
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> > ---
> > .../devicetree/bindings/pci/designware-pcie.txt    |    1 +
> > drivers/pci/host/pcie-designware.c                 |   17 +++++++++++++++--
> > 2 files changed, 16 insertions(+), 2 deletions(-)
> 
> Why should the cfg space be defined in *reg* instead of ranges?

Because what you end up using is a struct resource to represent the cfg space and
the conversion between ranges and resources breaks down for CFG space (we don't
have a flag in the resource flags to say this is CFG resource). Specifying it
as a *reg* property makes it a MEM resource and no special casing is needed.

Best regards,
Liviu

> 
> - k
> 
> -- 
> Employee of Qualcomm Innovation Center, Inc.
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
> 
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> 

-- 
-------------------
   .oooO
   (   )
    \ (  Oooo.
     \_) (   )
          ) /
         (_/

 One small step
   for me ...


  reply	other threads:[~2014-05-29 15:17 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-29  6:38 [PATCH v2 00/18] PCIe support for DRA7xx Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 01/18] phy: phy-omap-pipe3: Add support for PCIe PHY Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 02/18] phy: pipe3: insert delay to enumerate in GEN2 mode Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 03/18] PCI: designware: Configuration space should be specified in 'reg' Kishon Vijay Abraham I
2014-05-29  7:11   ` Mohit KUMAR DCG
2014-05-29 13:16     ` Kishon Vijay Abraham I
2014-05-29 15:03   ` Kumar Gala
2014-05-29 15:18     ` Liviu Dudau [this message]
2014-05-29 16:03       ` Kumar Gala
2014-05-29 16:30         ` Jason Gunthorpe
2014-05-29 16:51           ` Kumar Gala
2014-05-29 16:32   ` Murali Karicheri
2014-05-30  5:30     ` Kishon Vijay Abraham I
2014-05-30 14:15     ` Karicheri, Muralidharan
2014-06-18  9:14       ` Kishon Vijay Abraham I
2014-06-18  9:27         ` Jingoo Han
2014-05-29  6:38 ` [PATCH v2 04/18] PCI: designware: use untranslated address while programming ATU Kishon Vijay Abraham I
2014-06-18  9:08   ` Kishon Vijay Abraham I
2014-06-20 16:18     ` Arnd Bergmann
2014-06-20 17:45   ` Rob Herring
2014-06-20 18:54     ` Arnd Bergmann
2014-05-29  6:38 ` [PATCH v2 05/18] PCI: host: pcie-dra7xx: add support for pcie-dra7xx controller Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 06/18] ARM: dts: DRA7: Add divider table to optfclk_pciephy_div clock Kishon Vijay Abraham I
2014-06-19 11:10   ` Tero Kristo
2014-06-19 12:45     ` Kishon Vijay Abraham I
2014-06-19 13:27       ` Tero Kristo
2014-05-29  6:38 ` [PATCH v2 07/18] ARM: dts: DRA7: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck Kishon Vijay Abraham I
2014-06-19 11:12   ` Tero Kristo
2014-06-19 13:00     ` Kishon Vijay Abraham I
2014-06-19 13:24       ` Tero Kristo
2014-05-29  6:38 ` [PATCH v2 08/18] arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phy Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 09/18] arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystems Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 10/18] ARM: dts: dra7xx-clocks: Add missing 32khz clocks used for PHY Kishon Vijay Abraham I
2014-06-19 11:16   ` Tero Kristo
2014-06-19 13:23     ` Kishon Vijay Abraham I
2014-06-19 13:26       ` Tero Kristo
2014-05-29  6:38 ` [PATCH v2 11/18] ARM: dts: dra7: Add dt data for PCIe PHY control module Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 12/18] ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 13/18] ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe " Kishon Vijay Abraham I
2014-06-19 11:20   ` Tero Kristo
2014-06-19 13:25     ` Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 14/18] ARM: dts: dra7: Add dt data for PCIe PHY Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 15/18] ARM: dts: dra7: Add dt data for PCIe controller Kishon Vijay Abraham I
2014-05-29  6:38 ` [PATCH v2 16/18] ARM: OMAP: Enable PCI for DRA7 Kishon Vijay Abraham I
2014-05-29  6:48   ` Jingoo Han
2014-05-29 13:17     ` Kishon Vijay Abraham I
2014-05-29 17:52   ` Rob Herring
2014-05-29 17:54     ` Will Deacon
2014-05-29  6:38 ` [TEMP PATCH v2 17/18] PCI: host: pcie-dra7xx: use reset framework APIs to reset PCIe Kishon Vijay Abraham I
2014-05-29  6:38 ` [TEMP PATCH v2 18/18] ARM: dts: dra7: Add *resets* property for PCIe dt node Kishon Vijay Abraham I

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