From: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com>
To: ak@linux.intel.com
Cc: hpa@zytor.com, dzickus@redhat.com, matt@console-pimps.org,
peterz@infradead.org, acme@kernel.org, mingo@redhat.com,
paulus@samba.org, tglx@linutronix.de, x86@kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] perf/x86/intel: ignore CondChgd bit to avoid false NMI handling
Date: Wed, 02 Jul 2014 10:07:14 +0900 (JST) [thread overview]
Message-ID: <20140702.100714.29478419.d.hatayama@jp.fujitsu.com> (raw)
In-Reply-To: <20140630222224.GH19781@tassilo.jf.intel.com>
From: Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH v2] perf/x86/intel: ignore CondChgd bit to avoid false NMI handling
Date: Mon, 30 Jun 2014 15:22:24 -0700
>>
>> I'm also interested in the behaviour of CondChgd bit on Ivy Bridge processors.
>
> The intended meaning of CondChgd is that a hardware debugger has taken over the
> PMU. It shouldn't really be set in other circumstances.
>
Thanks for your explanation.
The hardware debugger you mean is a kind of ITP?
> I think right now for perf it would be best to just ignore it.
>
> In theory could stop using the PMU, but if some BIOS set it it would
> completely disable perf there. So better to just ignore it.
>
I'll reflect this information in the patch description.
--
Thanks.
HATAYAMA, Daisuke
prev parent reply other threads:[~2014-07-02 1:13 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-13 8:44 HATAYAMA Daisuke
2014-06-16 15:30 ` Don Zickus
2014-06-30 9:24 ` HATAYAMA, Daisuke
2014-06-30 22:22 ` Andi Kleen
2014-07-01 8:14 ` Peter Zijlstra
2014-07-01 14:22 ` Don Zickus
2014-07-02 1:07 ` HATAYAMA Daisuke [this message]
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