From: Peter Zijlstra <peterz@infradead.org>
To: Pranith Kumar <pranith@gatech.edu>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: Question regarding "Control Dependencies" in memory-barriers.txt
Date: Tue, 5 Aug 2014 14:58:19 +0200 [thread overview]
Message-ID: <20140805125819.GY19379@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <CAJhHMCBjub+_Gg_wC2EoR5OgzwT7JTHr-wzoGp_dePUBVwEG8g@mail.gmail.com>
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On Tue, Aug 05, 2014 at 08:13:54AM -0400, Pranith Kumar wrote:
> >> 689 q = ACCESS_ONCE(a);
> >> 690 BUILD_BUG_ON(MAX <= 1); /* Order load from a with store to b. */
> >> 691 if (q % MAX) {
> >> 692 ACCESS_ONCE(b) = p;
> >> 693 do_something();
> >> 694 } else {
> >> 695 ACCESS_ONCE(b) = p;
> >> 696 do_something_else();
> >> 697 }
> >> 698
> I don't think the write to 'b' here is speculative since it is
> happening in both the legs of the if() conditional. The write to b can
> be pulled out to before the conditional. Without the barrier(), isn't
> the following a valid transformation of the above?
>
> BUILD_BUG_ON(MAX <= 1); /* this will be compiled out if MAX != 1*/
> q = ACCESS_ONCE(a);
> ACCESS_ONCE(b) = p; / *BUG: No ordering */
> if (q % MAX) {
> do_something();
> } else {
> do_something_else();
> }
>
> I don't see how it is preserving the ordering.
Ah, that's what you meant. Yes possibly that's true.
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next prev parent reply other threads:[~2014-08-05 12:58 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-04 17:07 Pranith Kumar
2014-08-04 18:52 ` Paul E. McKenney
2014-08-04 21:03 ` Pranith Kumar
2014-08-05 7:32 ` Peter Zijlstra
2014-08-05 12:13 ` Pranith Kumar
2014-08-05 12:58 ` Peter Zijlstra [this message]
2014-08-13 22:44 ` Paul E. McKenney
2014-08-14 0:10 ` Pranith Kumar
2014-08-14 0:35 ` Paul E. McKenney
2014-08-14 1:03 ` Pranith Kumar
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