From: Andi Kleen <ak@linux.intel.com>
To: Stephane Eranian <eranian@google.com>
Cc: linux-kernel@vger.kernel.org, mingo@elte.hu,
peterz@infradead.org, kan.liang@intel.com
Subject: Re: [PATCH v2] perf/x86/uncore: update support for client uncore IMC PMU
Date: Wed, 17 Sep 2014 11:02:53 -0700 [thread overview]
Message-ID: <20140917180253.GV5387@tassilo.jf.intel.com> (raw)
In-Reply-To: <20140917090616.GA11281@quad>
On Wed, Sep 17, 2014 at 11:06:16AM +0200, Stephane Eranian wrote:
>
> This patch restructures the memory controller (IMC) uncore
> PMU support for client SNB/IVB/HSW processors. The main change
> is that it can now cope with more than one PCI device ID per
> processor model. There are many flavors of memory controllers
> for each processor. They have different PCI device ID, yet
> they behave the same w.r.t. the memory controller PMU that
> we are interested in.
>
> The patch now supports two distinct memory controllers for IVB
> processors: one for mobile, one for desktop.
>
> In V2, we fix the formatting issues reported by checkpatch.
Patch looks good to me.
-Andi
next prev parent reply other threads:[~2014-09-17 18:08 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-17 9:06 Stephane Eranian
2014-09-17 18:02 ` Andi Kleen [this message]
2014-09-24 15:01 ` [tip:perf/core] perf/x86/intel/uncore: Update " tip-bot for Stephane Eranian
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