From: Mika Westerberg <mika.westerberg@intel.com>
To: Loic Poulain <loic.poulain@intel.com>
Cc: linus.walleij@linaro.org, heikki.krogerus@linux.intel.com,
mathias.nyman@linux.intel.com, samuel.ortiz@intel.com,
linux-kernel@vger.kernel.org,
Eric Ernst <eric.ernst@linux.intel.com>
Subject: Re: [PATCHv2] pinctrl: baytrail: Clear DIRECT_IRQ bit
Date: Thu, 18 Sep 2014 12:53:49 +0300 [thread overview]
Message-ID: <20140918095349.GH10854@lahna.fi.intel.com> (raw)
In-Reply-To: <541AA677.7050907@intel.com>
On Thu, Sep 18, 2014 at 11:31:35AM +0200, Loic Poulain wrote:
> Warn seems necessary because we unconditionally change
> the pin behavior, I didn't meet any case where direct irq is truly
> used on our platform. But maybe it could happen?
> Don't want to cause any hidden regression.
The datasheet says
"""
This bit should be cleared if io access mode is selected
for this pad
"""
If I interpret it right, it means that whenever this pad is functioning
as a GPIO the flag should be cleared. That's precisely the case here.
> Moreover if it is confirmed that is an hardware issue (BIOS),
> We can just keep this patch locally as a workaround and revert
> it later once our BIOS fixed.
True but only if there aren't any machines out there with this flaw in
the BIOS.
next prev parent reply other threads:[~2014-09-18 9:54 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-17 13:47 Loic Poulain
2014-09-18 7:49 ` Mika Westerberg
2014-09-18 9:31 ` Loic Poulain
2014-09-18 9:53 ` Mika Westerberg [this message]
2014-09-18 9:41 ` Samuel Ortiz
2014-09-18 9:55 ` Mika Westerberg
2014-09-18 23:59 ` eric ernst
2014-09-23 15:44 ` Linus Walleij
2014-09-23 18:36 ` Westerberg, Mika
2014-09-24 8:44 ` Loic Poulain
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