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Date: Mon, 29 Sep 2014 11:14:03 +0300
From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Mikko Perttunen <mikko.perttunen@kapsi.fi>
CC: Thierry Reding <thierry.reding@gmail.com>,
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        Mikko Perttunen <mperttunen@nvidia.com>
Subject: Re: [PATCH v6 4/4] thermal: Add Tegra SOCTHERM thermal management
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Message-ID: <20140929081403.GF25537@tbergstrom-lnx.Nvidia.com>
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> >
> >>+struct tegra_tsensor_configuration {
> >>+	u32 tall, tsample, tiddq_en, ten_count;
> >>+	u32 pdiv, tsample_ate, pdiv_ate;
> >
> >What's the significance of the "ate" suffix?
> 
> Again, no idea.

I presume it's Automated Test Equipment refering to the device to test silicon
coming back from the fab.

Cheers,

Peter.