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From: Matt Fleming <matt@console-pimps.org>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@kernel.org>, Jiri Olsa <jolsa@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	linux-kernel@vger.kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
	Matt Fleming <matt.fleming@intel.com>
Subject: Re: [PATCH 11/11] perf/x86/intel: Perform rotation on Intel CQM RMIDs
Date: Wed, 8 Oct 2014 12:56:29 +0100	[thread overview]
Message-ID: <20141008115629.GR14343@console-pimps.org> (raw)
In-Reply-To: <20141008111927.GG4750@worktop.programming.kicks-ass.net>

On Wed, 08 Oct, at 01:19:27PM, Peter Zijlstra wrote:
> On Wed, Sep 24, 2014 at 03:04:15PM +0100, Matt Fleming wrote:
> > This scheme reserves one RMID at all times for rotation. When we need to
> > schedule a new event we give it the reserved RMID, pick a victim event
> > from the front of the global CQM list and wait for the victim's RMID to
> > drop to zero occupancy, before it becomes the new reserved RMID.
> 
> > +/*
> > + * If we fail to assign a new RMID for intel_cqm_rotation_rmid because
> > + * cachelines are still tagged with RMIDs in limbo, we progressively
> > + * increment the threshold until we find an RMID in limbo with <=
> > + * __intel_cqm_threshold lines tagged. This is designed to mitigate the
> > + * problem where cachelines tagged with an RMID are not steadily being
> > + * evicted.
> > + *
> > + * On successful rotations we decrease the threshold back towards zero.
> > + */
> > +static unsigned int __intel_cqm_threshold;
> 
> Ah, so I was about to tell you there is the possibiliy we'll never quite
> reach 0. But it appears you've cured that with this adaptive threshold
> thing?
 
Yeah, that is the idea. There are more games that we can play for
picking a "good" RMID to reuse, but this threshold provides a final
guarantee that we will make forward progress.

It also provides a good indication of how inaccurate you can expect your
results to be at any given time and for a particular event, but we don't
expose that currently. It might make sense to print a warning each time
the threshold reaches a new high.

> Is there an upper bound on the threshold after which we'll just wait, or
> will you keep increasing it until something matches?

We'll keep increasing it until something matches, though crucially, we
will decrease it for every consecutive match thereafter.

A threshold upper bound does seem like a good idea, though. I'm not a
massive fan of user-configurable knobs, but this does seem like the kind
of thing where people may want that control.

-- 
Matt Fleming, Intel Open Source Technology Center

  reply	other threads:[~2014-10-08 11:56 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-24 14:04 [PATCH 00/11] perf: Intel Cache QoS Monitoring support Matt Fleming
2014-09-24 14:04 ` [PATCH 01/11] perf stat: Fix AGGR_CORE segfault on multi-socket system Matt Fleming
2014-09-24 14:04 ` [PATCH 02/11] perf tools: Refactor unit and scale function parameters Matt Fleming
2014-09-29  9:21   ` Jiri Olsa
2014-10-03  5:25   ` [tip:perf/core] " tip-bot for Matt Fleming
2014-09-24 14:04 ` [PATCH 03/11] perf tools: Parse event per-package info files Matt Fleming
2014-09-24 14:04 ` [PATCH 04/11] perf: Make perf_cgroup_from_task() global Matt Fleming
2014-10-07 18:51   ` Peter Zijlstra
2014-10-08 10:27     ` Matt Fleming
2014-09-24 14:04 ` [PATCH 05/11] perf: Add ->count() function to read per-package counters Matt Fleming
2014-09-24 14:04 ` [PATCH 06/11] perf: Move cgroup init before PMU ->event_init() Matt Fleming
2014-10-07 19:34   ` Peter Zijlstra
2014-10-08 10:32     ` Matt Fleming
2014-10-08 10:49       ` Peter Zijlstra
2014-09-24 14:04 ` [PATCH 07/11] x86: Add support for Intel Cache QoS Monitoring (CQM) detection Matt Fleming
2014-09-24 14:04 ` [PATCH 08/11] perf/x86/intel: Add Intel Cache QoS Monitoring support Matt Fleming
2014-09-24 16:40   ` Andi Kleen
2014-09-24 20:27     ` Matt Fleming
2014-09-24 20:39       ` Andi Kleen
2014-09-29 18:51         ` Matt Fleming
2014-10-07 19:43   ` Peter Zijlstra
2014-10-08 10:36     ` Matt Fleming
2014-10-08 12:15       ` Matt Fleming
2014-10-08 14:47         ` Peter Zijlstra
2014-10-08 20:51           ` Peter Zijlstra
2014-09-24 14:04 ` [PATCH 09/11] perf/x86/intel: Implement LRU monitoring ID allocation for CQM Matt Fleming
2014-10-08  9:51   ` Peter Zijlstra
2014-10-08 10:53     ` Matt Fleming
2014-09-24 14:04 ` [PATCH 10/11] perf/x86/intel: Support task events with Intel CQM Matt Fleming
2014-09-24 14:45   ` Matt Fleming
2014-10-08 10:01   ` Peter Zijlstra
2014-10-08 11:07   ` Peter Zijlstra
2014-10-08 12:10     ` Matt Fleming
2014-10-08 14:49       ` Peter Zijlstra
2014-10-10 12:02         ` Matt Fleming
2014-10-10 14:02           ` Peter Zijlstra
2014-10-10 10:54     ` Peter Zijlstra
2014-10-10 11:10       ` Matt Fleming
2014-09-24 14:04 ` [PATCH 11/11] perf/x86/intel: Perform rotation on Intel CQM RMIDs Matt Fleming
2014-10-08 11:19   ` Peter Zijlstra
2014-10-08 11:56     ` Matt Fleming [this message]
2014-10-08 18:08   ` Peter Zijlstra
2014-10-08 19:02     ` Thomas Gleixner
2014-10-08 19:59       ` Matt Fleming
2014-10-08 18:10   ` Peter Zijlstra
2014-10-08 20:04     ` Matt Fleming
2014-10-01 14:36 [PATCH v2 00/11] perf: Intel Cache QoS Monitoring support Matt Fleming
2014-10-01 14:36 ` [PATCH 11/11] perf/x86/intel: Perform rotation on Intel CQM RMIDs Matt Fleming

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