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Date: Thu, 13 Nov 2014 17:36:31 +0000
From: Mark Brown <broonie@kernel.org>
To: Andrew Bresticker <abrestic@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
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On Wed, Nov 12, 2014 at 07:08:14PM -0800, Andrew Bresticker wrote:
> This series adds support for the Sychronous Peripheral Flash Interface
> master found on IMG SoCs.  The controller supports up to 5 chip-select
> lines and single, dual, and optionally quad, mode transfers.

Applied both, thanks.

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