From: Mark Brown <broonie@kernel.org>
To: Peter Rosin <peda@lysator.liu.se>
Cc: alsa-devel@alsa-project.org, Peter Rosin <peda@axentia.se>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.de>,
Liam Girdwood <lgirdwood@gmail.com>,
Clemens Ladisch <clemens@ladisch.de>,
Lars-Peter Clausen <lars@metafoo.de>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/7] ASoC: pcm512x: Change register default to match actual content after reset
Date: Wed, 28 Jan 2015 19:12:17 +0000 [thread overview]
Message-ID: <20150128191217.GF21293@sirena.org.uk> (raw)
In-Reply-To: <1422454572-7847-4-git-send-email-peda@lysator.liu.se>
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On Wed, Jan 28, 2015 at 03:16:08PM +0100, Peter Rosin wrote:
> @@ -78,7 +78,7 @@ static const struct reg_default pcm512x_reg_defaults[] = {
> { PCM512x_DIGITAL_VOLUME_2, 0x30 },
> { PCM512x_DIGITAL_VOLUME_3, 0x30 },
> { PCM512x_DIGITAL_MUTE_1, 0x22 },
> - { PCM512x_DIGITAL_MUTE_2, 0x00 },
> + { PCM512x_DIGITAL_MUTE_2, 0x02 },
The datasheet claims these have undefined values as reserved bits - what
would be a more robust change here would be to remove the register
default entirely so that we take the value the hardware has, giving
robustness against any hardware revisions. Of course the device has
rather a lot of such reserved bits which is unfortunate.
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next prev parent reply other threads:[~2015-01-29 3:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-28 14:16 [PATCH v2 0/7] ASoC: pcm512x: Clock master modes Peter Rosin
2015-01-28 14:16 ` [PATCH v2 1/7] ALSA: pcm: Add snd_interval_ranges() and snd_pcm_hw_constraint_ranges() Peter Rosin
2015-01-28 17:19 ` Takashi Iwai
2015-01-28 14:16 ` [PATCH v2 2/7] ASoC: pcm512x: Fix spelling of register field names Peter Rosin
2015-01-28 14:16 ` [PATCH v2 3/7] ASoC: pcm512x: Change register default to match actual content after reset Peter Rosin
2015-01-28 19:12 ` Mark Brown [this message]
2015-01-28 20:42 ` Peter Rosin
2015-01-28 14:16 ` [PATCH v2 4/7] ASoC: pcm512x: Support mastering BCLK/LRCLK without using the PLL Peter Rosin
2015-01-28 14:16 ` [PATCH v2 5/7] ASoC: pcm512x: Support mastering BCLK/LRCLK " Peter Rosin
2015-01-28 19:14 ` Mark Brown
2015-01-28 14:16 ` [PATCH v2 6/7] ASoC: pcm512x: Avoid the PLL for the DAC clock, if possible Peter Rosin
2015-01-28 14:16 ` [PATCH v2 7/7] ASoC: pcm512x: Support SND_SOC_DAIFMT_CBM_CFS Peter Rosin
2015-01-28 19:29 ` [PATCH v2 0/7] ASoC: pcm512x: Clock master modes Mark Brown
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