From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Jerome Blin <jerome.blin@intel.com>,
Heikki Krogerus <heikki.krogerus@linux.intel.com>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] pinctrl: cherryview: Configure HiZ pins to be input when requested as GPIOs
Date: Wed, 4 Feb 2015 17:37:56 +0200 [thread overview]
Message-ID: <20150204153756.GJ18758@lahna.fi.intel.com> (raw)
In-Reply-To: <CACRpkdYBnE18CJ6DZDnRQxJi9XEpVdE3UTcAqwCgrb8ewPR3jQ@mail.gmail.com>
On Wed, Feb 04, 2015 at 10:01:49AM +0100, Linus Walleij wrote:
> On Thu, Jan 29, 2015 at 11:44 AM, Mika Westerberg
> <mika.westerberg@linux.intel.com> wrote:
>
> > If the pin is in HiZ mode when it is requested as GPIO its value cannot be
> > read (it always returns 0). In order to cope with the Linux GPIO subsystem
> > where we do not have such state at all, turn the pin to be input instead.
> >
> > Reported-by: Jerome Blin <jerome.blin@intel.com>
> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
>
> Patch applied.
Thanks.
> Since putting a pin into GPIO mode start poking around in essentially pin
> control registers, we may need to revisit the issue of the pin control subsystem
> not denying simultaneous use of a pin for a device muxing and GPIO.
> Maybe the "strict" setting forcing a pin to be either one or the other on
> a per-driver basis would enforce a better policy on this driver (and some
> others).
Yes, something like that sounds reasonable.
prev parent reply other threads:[~2015-02-04 15:38 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-29 10:44 Mika Westerberg
2015-02-04 9:01 ` Linus Walleij
2015-02-04 15:37 ` Mika Westerberg [this message]
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