From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752950AbbBYOub (ORCPT ); Wed, 25 Feb 2015 09:50:31 -0500 Received: from mail-wg0-f52.google.com ([74.125.82.52]:37168 "EHLO mail-wg0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752728AbbBYOu3 (ORCPT ); Wed, 25 Feb 2015 09:50:29 -0500 Date: Wed, 25 Feb 2015 14:50:17 +0000 From: Lee Jones To: Bart Tanghe Cc: swarren@wwwdotorg.org, lee@kernel.org, thierry.reding@gmail.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4] ARM: dts: add bcm2835-pwm bindings Message-ID: <20150225145017.GB5132@x1> References: <1421325190-7648-1-git-send-email-bart.tanghe@thomasmore.be> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1421325190-7648-1-git-send-email-bart.tanghe@thomasmore.be> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 15 Jan 2015, Bart Tanghe wrote: > To probe the bcm2835-pwm driver properly, this dts bindings has to be added > to the bcm2835 dtsi file. > In expectation of a bcm2835 clock driver, I've added fixed-clock clock binding. > --- > Changes in v4: > - node added by reg value > > Signed-off-by: Bart Tanghe > Acked-by: Stephen Warren Applied, thanks. > diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi > index 3342cb1..e8a0f13 100644 > --- a/arch/arm/boot/dts/bcm2835.dtsi > +++ b/arch/arm/boot/dts/bcm2835.dtsi > @@ -122,6 +123,14 @@ > status = "disabled"; > }; > > + pwm: pwm@7e20c000 { > + compatible = "brcm,bcm2835-pwm"; > + reg = <0x7e20c000 0x28>; > + clocks = <&clk_pwm>; > + #pwm-cells = <2>; > + status = "disabled"; > + }; > + > sdhci: sdhci@7e300000 { > compatible = "brcm,bcm2835-sdhci"; > reg = <0x7e300000 0x100>; > @@ -179,5 +188,13 @@ > clock-output-names = "spi"; > clock-frequency = <250000000>; > }; > + > + clk_pwm: clock@3 { > + compatible = "fixed-clock"; > + reg = <3>; > + #clock-cells = <0>; > + clock-output-names = "pwm"; > + clock-frequency = <9200000>; > + }; > }; > }; -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog