From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753608AbbCKMqi (ORCPT ); Wed, 11 Mar 2015 08:46:38 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:35984 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753583AbbCKMqd (ORCPT ); Wed, 11 Mar 2015 08:46:33 -0400 Date: Wed, 11 Mar 2015 12:45:55 +0000 From: Mark Brown To: Viresh Kumar Cc: Mark Rutland , Catalin Marinas , Chen Fan , Ian Campbell , Howard Chen , "Joe.C" , "devicetree@vger.kernel.org" , Linaro Kernel Mailman List , Pawel Moll , "linux-pm@vger.kernel.org" , Sascha Hauer , Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , Eddie Huang , "linux-arm-kernel@lists.infradead.org" , Thomas Petazzoni , "Rafael J. Wysocki" , Linux Kernel Mailing List , Kumar Gala Message-ID: <20150311124555.GB28806@sirena.org.uk> References: <1425458956-20665-1-git-send-email-pi-cheng.chen@linaro.org> <1425458956-20665-4-git-send-email-pi-cheng.chen@linaro.org> <20150311105307.GW28806@sirena.org.uk> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="5qKznMjKMQvXoTz3" Content-Disposition: inline In-Reply-To: X-Cookie: Editing is a rewording activity. User-Agent: Mutt/1.5.23 (2014-03-12) X-SA-Exim-Connect-IP: 94.175.94.161 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Re: [PATCH v2 3/4] cpufreq: mediatek: add Mediatek cpufreq driver X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --5qKznMjKMQvXoTz3 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Mar 11, 2015 at 04:33:49PM +0530, Viresh Kumar wrote: > On mediatek platform, they need to configure two regulators in order to change > DVFS state of the big cluster. The generic cpufreq-dt driver and earlier OPP > bindings have support for a single regulator only and so what Pi-cheng tried > to do is, > - Configure one of the regulators using cpufreq-dt > - And other one using cpufreq frequency change notifiers > This looks awkward.. > What I suggested was to create another virtual regulator for CPU which will > eventually configure both the regulators. And so the question that such > virtual regulators are allowed or not. Ugh, no - that's a hideous bodge which is only going to create trouble later. Remember, DT is an ABI and should describe the hardware so if we're doing bodges that are visible there to shoehorn things onto our implementation that's bad. The concerns that Pi-Cheng had about what happens if the PMIC gets changed definitely seem relevant here too. --5qKznMjKMQvXoTz3 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAEBCAAGBQJVADkCAAoJECTWi3JdVIfQ+LQH/0PaXaOriaHMAntbv8Cmikro 3q7S/3alsiqF507W3WX79Chn+OGyFs4CjqB/Lk5RaR3lqfI55F+Op/MBat0sSkpN OYa07sEJ5zkPNBsc1z9RCp6I7mcHHGVAIfgP+NibitafxltofZJsA11Jku2zilMM Ga2otIruxlTju9lZEDRci8Y+TSMBeTvOhoCuAeww31WeQeOekGUzdM5/wSRJIQFL 7y0ICqwbhy4cYglS2m2GPFjPwSCOi+WgDo9SnVZFbn65Jv0Cgq1Pr/hxQRmu2kH/ HaJj411TVoLoa0CT7Rt5RkSqdmf5CbdZ3UOLvXBazxY2wCcIy0X7BD61uv9L/ew= =cqDt -----END PGP SIGNATURE----- --5qKznMjKMQvXoTz3--