From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753018AbbCPFe0 (ORCPT ); Mon, 16 Mar 2015 01:34:26 -0400 Received: from metis.ext.pengutronix.de ([92.198.50.35]:60338 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752887AbbCPFeW (ORCPT ); Mon, 16 Mar 2015 01:34:22 -0400 Date: Mon, 16 Mar 2015 06:34:19 +0100 From: Sascha Hauer To: Matthias Brugger Cc: Mike Turquette , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, YH Chen , kernel@pengutronix.de, Yingjoe Chen , Eddie Huang , Henry Chen , James Liao Subject: Re: [PATCH 1/5] clk: mediatek: Add initial common clock support for Mediatek SoCs. Message-ID: <20150316053419.GE24798@pengutronix.de> References: <1424605765-19751-1-git-send-email-s.hauer@pengutronix.de> <1424605765-19751-2-git-send-email-s.hauer@pengutronix.de> <55031468.2040109@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <55031468.2040109@gmail.com> X-Sent-From: Pengutronix Hildesheim X-URL: http://www.pengutronix.de/ X-IRC: #ptxdist @freenode X-Accept-Language: de,en X-Accept-Content-Type: text/plain X-Uptime: 06:33:45 up 1 day, 17:55, 21 users, load average: 0.03, 0.03, 0.05 User-Agent: Mutt/1.5.21 (2010-09-15) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 13, 2015 at 05:46:32PM +0100, Matthias Brugger wrote: > > > On 22/02/15 12:49, Sascha Hauer wrote: > > From: James Liao > > > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h > > new file mode 100644 > > index 0000000..c7c0d35 > > --- /dev/null > > +++ b/drivers/clk/mediatek/clk-mtk.h > > [...] > > > +void __init mtk_clk_register_plls(struct device_node *node, > > + const struct mtk_pll_data *plls, int num_plls); > > + > > +#ifdef CONFIG_RESET_CONTROLLER > > +void mtk_register_reset_controller(struct device_node *np, > > + unsigned int num_regs, int regofs); > > +#else > > +static inline void mtk_register_reset_controller(struct device_node *np, > > + unsigned int num_regs, int regofs) > > +{ > > +} > > +#endif > > This lines should only be added once in [2/5], compiling ends with: > > In file included from drivers/clk/mediatek/clk-mtk.c:24:0: > drivers/clk/mediatek/clk-mtk.h:168:20: error: redefinition of ‘mtk_register_reset_controller’ > drivers/clk/mediatek/clk-mtk.h:158:20: note: previous definition of ‘mtk_register_reset_controller’ was here Hm, seems to be a rebase accident. Fixed, thanks Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |