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From: Peter Zijlstra <peterz@infradead.org>
To: Vikas Shivappa <vikas.shivappa@intel.com>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>,
	linux-kernel@vger.kernel.org, x86@kernel.org, hpa@zytor.com,
	tglx@linutronix.de, mingo@kernel.org, tj@kernel.org,
	Matt Fleming <matt.fleming@intel.com>,
	"Auld, Will" <will.auld@intel.com>,
	peter.zijlstra@intel.com, h.peter.anvin@intel.com, "Juvva,
	Kanaka D" <kanaka.d.juvva@intel.com>
Subject: Re: [PATCH 3/7] x86/intel_rdt: Support cache bit mask for Intel CAT
Date: Wed, 6 May 2015 10:11:43 +0200	[thread overview]
Message-ID: <20150506081143.GV23123@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <alpine.DEB.2.10.1505041014040.6658@vshiva-Udesk>

On Mon, May 04, 2015 at 10:30:15AM -0700, Vikas Shivappa wrote:
> Will fix the whitespace issues (including before return) or other possible
> coding convention issues.
> 
> It could be more of a common sense to have this in checkpatch rather that
> manually having to pointing out. If you want to have fun with that go for it
> though.

My main objection was that your coding style is entirely inconsistent
with itself.

Sometimes you have a whitespace before return, sometimes you do not.

Sometimes you have exit labels with locks, sometimes you do not.

etc..

Pick one stick to it; although we'd all much prefer if you pick the one
that's common to the kernel.

  parent reply	other threads:[~2015-05-06  8:12 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-02  1:36 [PATCH V6 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-05-02  1:36 ` [PATCH 1/7] x86/intel_rdt: Intel Cache Allocation Technology detection Vikas Shivappa
2015-05-02 18:35   ` Peter Zijlstra
2015-05-02  1:36 ` [PATCH 2/7] x86/intel_rdt: Adds support for Class of service management Vikas Shivappa
2015-05-02 18:38   ` Peter Zijlstra
2015-05-04 17:31     ` Vikas Shivappa
2015-05-02  1:36 ` [PATCH 3/7] x86/intel_rdt: Support cache bit mask for Intel CAT Vikas Shivappa
2015-05-02 18:46   ` Peter Zijlstra
2015-05-04 17:30     ` Vikas Shivappa
2015-05-06  8:09       ` Peter Zijlstra
2015-05-06  8:30         ` Matt Fleming
2015-05-06 16:48         ` Vikas Shivappa
2015-05-06  8:11       ` Peter Zijlstra [this message]
2015-05-06 18:09         ` Vikas Shivappa
2015-05-02  1:36 ` [PATCH 4/7] x86/intel_rdt: Implement scheduling support for Intel RDT Vikas Shivappa
2015-05-02 18:51   ` Peter Zijlstra
2015-05-04 18:39     ` Vikas Shivappa
2015-05-06  7:48       ` Peter Zijlstra
2015-05-07 23:15         ` Vikas Shivappa
2015-05-08  8:59           ` Peter Zijlstra
2015-05-08 20:55             ` Vikas Shivappa
2015-05-06  0:19     ` Vikas Shivappa
2015-05-06  7:50       ` Peter Zijlstra
2015-05-02  1:36 ` [PATCH 5/7] x86/intel_rdt: Software Cache for IA32_PQR_MSR Vikas Shivappa
2015-05-02  1:36 ` [PATCH 6/7] x86/intel_rdt: Intel haswell CAT enumeration Vikas Shivappa
2015-05-02  1:36 ` [PATCH 7/7] x86/intel_rdt: Add CAT documentation and usage guide Vikas Shivappa
  -- strict thread matches above, loose matches on Subject: below --
2015-03-12 23:16 [PATCH V5 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-03-12 23:16 ` [PATCH 3/7] x86/intel_rdt: Support cache bit mask for Intel CAT Vikas Shivappa
2015-04-09 20:56   ` Marcelo Tosatti
2015-04-13  2:36     ` Vikas Shivappa
2015-02-24 23:16 [PATCH V4 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-02-24 23:16 ` [PATCH 3/7] x86/intel_rdt: Support cache bit mask for Intel CAT Vikas Shivappa
2015-02-27 12:12   ` Tejun Heo
2015-02-27 12:18     ` Tejun Heo
2015-02-27 19:34     ` Vikas Shivappa
2015-02-27 19:42       ` Tejun Heo
2015-02-27 21:38         ` Vikas Shivappa

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