From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753492AbbENJVp (ORCPT ); Thu, 14 May 2015 05:21:45 -0400 Received: from mail.skyhub.de ([78.46.96.112]:43243 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753176AbbENJVn (ORCPT ); Thu, 14 May 2015 05:21:43 -0400 Date: Thu, 14 May 2015 11:21:37 +0200 From: Borislav Petkov To: Huang Rui Cc: Len Brown , "Rafael J. Wysocki" , linux-kernel@vger.kernel.org, Fengguang Wu , Aaron Lu , Tony Li , Thomas Gleixner Subject: Re: Mwait usage on AMD processors Message-ID: <20150514092137.GA29235@pd.tnic> References: <20150514065451.GA29830@hr-slim.amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20150514065451.GA29830@hr-slim.amd.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 14, 2015 at 02:54:52PM +0800, Huang Rui wrote: > Hi Len, Rafael, and all, > > AMD proposed a new instruction named mwaitx. This is an extension of > mwait with a configurable timer (mwaitx = mwait + timer). And mwaitx > will act as mwait if timer is disabled. However, mwait/mwaitx cannot > let cpu core go to C1 state at current AMD processors, but has less > power consumption even at C0 while core is waiting. > As you know, mwait/mwaitx would have better performance than halt. So > could we propose an implementation to use mwaitx at idle call in boot > phase and cpuidle driver after boot phase. I'd select it in select_idle_routine()... > And the mwaitx idle is exposed to user as an optional kernel > parameter(idle=...), and decided by user. If MWAITX is better than C1 (and C1E, which we're doing now AFAIR) then I'd enable it by default on those machines so that it is used automatically. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --