From: Borislav Petkov <bp@alien8.de>
To: Vikas Shivappa <vikas.shivappa@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Vikas Shivappa <vikas.shivappa@linux.intel.com>,
x86@kernel.org, linux-kernel@vger.kernel.org, hpa@zytor.com,
mingo@kernel.org, tj@kernel.org, peterz@infradead.org,
Matt Fleming <matt.fleming@intel.com>,
"Auld, Will" <will.auld@intel.com>,
peter.zijlstra@intel.com, h.peter.anvin@intel.com, "Juvva,
Kanaka D" <kanaka.d.juvva@intel.com>,
mtosatti@redhat.com
Subject: Re: [PATCH 2/7] x86/intel_rdt: Adds support for Class of service management
Date: Tue, 19 May 2015 22:35:25 +0200 [thread overview]
Message-ID: <20150519203525.GQ4641@pd.tnic> (raw)
In-Reply-To: <alpine.DEB.2.10.1505191029310.6658@vshiva-Udesk>
On Tue, May 19, 2015 at 10:33:55AM -0700, Vikas Shivappa wrote:
> Yes the max bitmask and max closid can be read from cpuid. the presence of
> rdt and l3 cache alloc is indicated by rdt and cat_l3 in /proc/cpuinfo. So
> even if this message gets overwritten , user can see the feature enabled in
> kernel.
>
> Can be modified somthing similar to "Intel cache allocation enabled" as well.
Yeah, that would have more value to the user than a cryptic message
about closids and bitmask length.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
--
next prev parent reply other threads:[~2015-05-19 20:35 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-11 19:02 [PATCH V7 0/7] x86/intel_rdt: Intel Cache Allocation support Vikas Shivappa
2015-05-11 19:02 ` [PATCH 1/7] x86/intel_rdt: Intel Cache Allocation detection Vikas Shivappa
2015-05-11 19:02 ` [PATCH 2/7] x86/intel_rdt: Adds support for Class of service management Vikas Shivappa
2015-05-15 19:18 ` Thomas Gleixner
2015-05-18 17:59 ` Vikas Shivappa
2015-05-18 18:41 ` Thomas Gleixner
2015-05-18 19:20 ` Borislav Petkov
2015-05-19 17:33 ` Vikas Shivappa
2015-05-19 20:35 ` Borislav Petkov [this message]
2015-05-18 19:44 ` Vikas Shivappa
2015-05-18 18:52 ` Thomas Gleixner
2015-05-18 19:27 ` Vikas Shivappa
2015-05-11 19:02 ` [PATCH 3/7] x86/intel_rdt: Add support for cache bit mask management Vikas Shivappa
2015-05-15 19:25 ` Thomas Gleixner
2015-05-18 19:17 ` Vikas Shivappa
2015-05-18 20:15 ` Thomas Gleixner
2015-05-18 21:09 ` Vikas Shivappa
2015-05-20 17:22 ` Vikas Shivappa
2015-05-20 19:02 ` Thomas Gleixner
2015-05-21 0:54 ` Thomas Gleixner
2015-05-21 16:36 ` Vikas Shivappa
2015-05-11 19:02 ` [PATCH 4/7] x86/intel_rdt: Implement scheduling support for Intel RDT Vikas Shivappa
2015-05-15 19:39 ` Thomas Gleixner
2015-05-18 18:01 ` Vikas Shivappa
2015-05-18 18:45 ` Thomas Gleixner
2015-05-18 19:18 ` Vikas Shivappa
2015-05-11 19:02 ` [PATCH 5/7] x86/intel_rdt: Software Cache for IA32_PQR_MSR Vikas Shivappa
2015-05-15 20:15 ` Thomas Gleixner
2015-05-20 17:18 ` Vikas Shivappa
2015-05-20 18:50 ` Thomas Gleixner
2015-05-20 20:43 ` Vikas Shivappa
2015-05-20 21:14 ` Thomas Gleixner
2015-05-20 22:51 ` Vikas Shivappa
2015-05-11 19:02 ` [PATCH 6/7] x86/intel_rdt: Intel haswell Cache Allocation enumeration Vikas Shivappa
2015-05-11 19:02 ` [PATCH 7/7] x86/intel_rdt: Add Cache Allocation documentation and usage guide Vikas Shivappa
2015-05-13 16:52 ` [PATCH V7 0/7] x86/intel_rdt: Intel Cache Allocation support Vikas Shivappa
-- strict thread matches above, loose matches on Subject: below --
2015-05-02 1:36 [PATCH V6 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-05-02 1:36 ` [PATCH 2/7] x86/intel_rdt: Adds support for Class of service management Vikas Shivappa
2015-05-02 18:38 ` Peter Zijlstra
2015-05-04 17:31 ` Vikas Shivappa
2015-03-12 23:16 [PATCH V5 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-03-12 23:16 ` [PATCH 2/7] x86/intel_rdt: Adds support for Class of service management Vikas Shivappa
2015-02-24 23:16 [PATCH V4 0/7] x86/intel_rdt: Intel Cache Allocation Technology Vikas Shivappa
2015-02-24 23:16 ` [PATCH 2/7] x86/intel_rdt: Adds support for Class of service management Vikas Shivappa
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