From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756610AbbE2Rgm (ORCPT ); Fri, 29 May 2015 13:36:42 -0400 Received: from mail.skyhub.de ([78.46.96.112]:60621 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756443AbbE2Rgg (ORCPT ); Fri, 29 May 2015 13:36:36 -0400 Date: Fri, 29 May 2015 19:36:23 +0200 From: Borislav Petkov To: Ashok Raj Cc: linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, Borislav Petkov , Tony Luck Subject: Re: [Patch V1 3/3] x86, mce: Handling LMCE events Message-ID: <20150529173623.GN31435@pd.tnic> References: <1432916882-1304-1-git-send-email-ashok.raj@intel.com> <1432916882-1304-4-git-send-email-ashok.raj@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1432916882-1304-4-git-send-email-ashok.raj@intel.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 29, 2015 at 09:28:02AM -0700, Ashok Raj wrote: > This patch has handling changes to do_machine_check() to process MCE > signaled as local MCE. Typically only recoverable errors (SRAR) type > error will be Signaled as LMCE. But architecture does not restrict to > only those errors. > > When errors are signaled as LMCE, there is no need for the MCE handler to > perform rendezvous with other logical processors unlike earlier processors > that would broadcast machine check errors. > > See http://www.intel.com/sdm Volume 3, Chapter 15 for more information > on MSR's and documentation on Local MCE. > > Signed-off-by: Ashok Raj > --- > arch/x86/kernel/cpu/mcheck/mce.c | 25 ++++++++++++++++++++++--- > arch/x86/kernel/cpu/mcheck/mce_intel.c | 1 + > 2 files changed, 23 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c > index d10aada..c130391 100644 > --- a/arch/x86/kernel/cpu/mcheck/mce.c > +++ b/arch/x86/kernel/cpu/mcheck/mce.c > @@ -1047,6 +1047,7 @@ void do_machine_check(struct pt_regs *regs, long error_code) > char *msg = "Unknown"; > u64 recover_paddr = ~0ull; > int flags = MF_ACTION_REQUIRED; > + int lmce = 0; > > prev_state = ist_enter(regs); > > @@ -1074,11 +1075,19 @@ void do_machine_check(struct pt_regs *regs, long error_code) > kill_it = 1; > > /* > + * Check if this MCE is signaled to only this logical processor > + */ > + if (m.mcgstatus & MCG_STATUS_LMCES) > + lmce = 1; else /* * Go through ... * ... */ order = mce_start(&no_way_out); > + /* > * Go through all the banks in exclusion of the other CPUs. > * This way we don't report duplicated events on shared banks > * because the first one to see it will clear it. > + * If this is a Local MCE, then no need to perform rendezvous. > */ > - order = mce_start(&no_way_out); > + if (!lmce) > + order = mce_start(&no_way_out); > + > for (i = 0; i < cfg->banks; i++) { > __clear_bit(i, toclear); > if (!test_bit(i, valid_banks)) -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --