From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756812AbbE2RpA (ORCPT ); Fri, 29 May 2015 13:45:00 -0400 Received: from mail.skyhub.de ([78.46.96.112]:47432 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756725AbbE2Rox (ORCPT ); Fri, 29 May 2015 13:44:53 -0400 Date: Fri, 29 May 2015 19:44:39 +0200 From: Borislav Petkov To: Ashok Raj Cc: linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, Borislav Petkov , Tony Luck Subject: Re: [Patch V1 2/3] x86, mce: Add infrastructure required to support LMCE Message-ID: <20150529174439.GO31435@pd.tnic> References: <1432916882-1304-1-git-send-email-ashok.raj@intel.com> <1432916882-1304-3-git-send-email-ashok.raj@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1432916882-1304-3-git-send-email-ashok.raj@intel.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 29, 2015 at 09:28:01AM -0700, Ashok Raj wrote: > Initialization and handling for LMCE > - boot time option to disable LMCE for that boot instance > - Check for capability via IA32_MCG_CAP > - provide ability to enable/disable LMCE on demand. > > See http://www.intel.com/sdm Volume 3 System Programming Guide, Chapter 15 > for more information on MSR's and documentation on Local MCE. > > Signed-off-by: Ashok Raj > --- > Documentation/x86/x86_64/boot-options.txt | 3 ++ > arch/x86/include/asm/mce.h | 5 +++ > arch/x86/kernel/cpu/mcheck/mce.c | 3 ++ > arch/x86/kernel/cpu/mcheck/mce_intel.c | 75 +++++++++++++++++++++++++++++++ > 4 files changed, 86 insertions(+) ... > +static bool lmce_supported(void) > +{ > + u64 cap, feature_ctl; > + bool lmce_bios_support, retval; > + > + if (mca_cfg.lmce_disabled) > + return false; > + > + rdmsrl(MSR_IA32_MCG_CAP, cap); > + rdmsrl(MSR_IA32_FEATURE_CONTROL, feature_ctl); One more thing: You should check MCG_LMCE_P *first* and only read MSR_IA32_FEATURE_CONTROL if MCG_LMCE_P is set - otherwise this'll start blowing up on older machines which don't sport that new MSR and on kvm. > + /* > + * BIOS should indicate support for LMCE by setting > + * bit20 in IA32_FEATURE_CONTROL. without which touching > + * MCG_EXT_CTL will generate #GP fault. > + */ > + lmce_bios_support = ((feature_ctl & (FEATURE_CONTROL_LMCE_BITS)) == > + (FEATURE_CONTROL_LMCE_BITS)); > + > + /* > + * MCG_CAP should indicate both MCG_SER_P and MCG_LMCE_P > + */ Also, why do we need to look at MCG_SER_P for LMCE? Btw, we do that already in __mcheck_cpu_cap_init() so you could check mca_cfg.ser here instead. > + cap = ((cap & MCG_CAP_LMCE_BITS) == (MCG_CAP_LMCE_BITS)); > + retval = (cap && lmce_bios_support); -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --