From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757138AbbE2UHC (ORCPT ); Fri, 29 May 2015 16:07:02 -0400 Received: from vps0.lunn.ch ([178.209.37.122]:48175 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756966AbbE2UGy (ORCPT ); Fri, 29 May 2015 16:06:54 -0400 Date: Fri, 29 May 2015 22:01:22 +0200 From: Andrew Lunn To: Mathieu Olivari Cc: Florian Fainelli , robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, davem@davemloft.net, linux@roeck-us.net, gang.chen.5i5j@gmail.com, jiri@resnulli.us, leitec@staticky.com, fabf@skynet.be, alexander.h.duyck@intel.com, pavel.nakonechny@skitlab.ru, joe@perches.com, sfeldma@gmail.com, nbd@openwrt.org, juhosg@openwrt.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org Subject: Re: [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support\ Message-ID: <20150529200122.GB22739@lunn.ch> References: <1432863742-18427-1-git-send-email-mathieu@codeaurora.org> <20150529020001.GF11260@lunn.ch> <20150529184951.GA2458@codeaurora.org> <20150529185953.GF19580@lunn.ch> <5568C4D4.7010701@gmail.com> <20150529195955.GA2884@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20150529195955.GA2884@codeaurora.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > > What it requires is that for each user port, you can configure what > > > cpu port it should use. Marvell devices have this ability, and at a > > > first look, it seems like SF2 does as well, but i will leave Florian > > > to answer definitively. > > > > That's right, such configuration happens by using VLAN_CTL in the > > context of SF2, by default only Port and CPU can talk to each other. > > Bridging ports involving putting them in the same domain, e.g: updating > > the VLAN_CTL bitmask to include all bridge members. > > Similar here. That would work for ar8xxx too. Great. I posted the patches. Comments welcome and lets try to make them work for all device types, if they don't already. Andre