From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754406AbbFOOeR (ORCPT ); Mon, 15 Jun 2015 10:34:17 -0400 Received: from mail-bn1bn0106.outbound.protection.outlook.com ([157.56.110.106]:9876 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752139AbbFOOeL (ORCPT ); Mon, 15 Jun 2015 10:34:11 -0400 Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=amd.com; amacapital.net; dkim=none (message not signed) header.d=none; X-WSS-ID: 0NPZPST-08-97K-02 X-M-MSG: Date: Mon, 15 Jun 2015 22:33:08 +0800 From: Huang Rui To: Borislav Petkov CC: Peter Zijlstra , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , "Rafael J. Wysocki" , Len Brown , John Stultz , =?iso-8859-1?Q?Fr=E9d=E9ric?= Weisbecker , , , Fengguang Wu , Aaron Lu , Suravee Suthikulanit , Tony Li , Ken Xue Subject: Re: [PATCH v5 2/2] x86, mwaitt: introduce mwaix delay with a configurable timer Message-ID: <20150615143307.GA28898@hr-slim.amd.com> References: <1434365284-1495-1-git-send-email-ray.huang@amd.com> <1434365284-1495-3-git-send-email-ray.huang@amd.com> <20150615105718.GW3644@twins.programming.kicks-ass.net> <20150615111526.GB4481@pd.tnic> <20150615140418.GB28310@hr-slim.amd.com> <20150615142559.GC4481@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20150615142559.GC4481@pd.tnic> User-Agent: Mutt/1.5.21 (2010-09-15) X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BY2FFO11FD031;1:ePeUBESzAIDH6xF2gw+VZRhI4VT3+VGfoVovYEfPfGjntBZAOElM65udBXqN22ld4YzNGPBDlxlltntE7usaqs497cjs7YzT1M70Uox8TY9EgKVds23G1lyoczY1wurctzXoX91HRAnouB0muxFHf9bvv8cbIJbR8Oc/Al+5UYiEUtBGpVKXlOlYhtIlY876e8HgHQBMUOSNuwCnLVP3J7NjF4uaVJU5yjvyMjyJFFAEIkP3DYuPRQQQYKXOkpGr0zpKEGMkfEdNhzgPUu2nAwxzacXRBrBdmW5Bennxl27fWCA7UdUbSNPUwuF9sjHf1te4dqbGW9P5CqlsbO6jqAzT/E0rHBqi9ZJAKJAF7vM= X-Forefront-Antispam-Report: CIP:165.204.84.222;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(428002)(189002)(199003)(24454002)(164054003)(76176999)(50986999)(83506001)(46406003)(54356999)(105586002)(23726002)(86362001)(106466001)(50466002)(53416004)(33656002)(101416001)(47776003)(92566002)(77096005)(2950100001)(87936001)(93886004)(4001350100001)(77156002)(97756001)(62966003)(189998001)(110136002)(46102003)(5003600100002);DIR:OUT;SFP:1102;SCL:1;SRVR:BN1PR02MB072;H:atltwp02.amd.com;FPR:;SPF:None;MLV:sfv;MX:1;A:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN1PR02MB072; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5005006)(520003)(3002001);SRVR:BN1PR02MB072;BCL:0;PCL:0;RULEID:;SRVR:BN1PR02MB072; X-Forefront-PRVS: 0608DEDB67 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jun 2015 14:34:07.2351 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96;Ip=[165.204.84.222];Helo=[atltwp02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1PR02MB072 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jun 15, 2015 at 04:25:59PM +0200, Borislav Petkov wrote: > On Mon, Jun 15, 2015 at 10:04:19PM +0800, Huang Rui wrote: > > Hmm, the current processor cannot enter C1 with MWAITX, so I don't > > confirm if it would have higher wakeup latency on C1 in future. > > I remember you saying MWAITX enters currently something between C1 and > C0. How does that behave wrt latency and power savings? > Yes, right. The power consumption is less than C0 (C0 > MWAITX > C1). The waiting exit speed is faster than HTL. Thanks, Rui