From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753047AbbGMU6D (ORCPT ); Mon, 13 Jul 2015 16:58:03 -0400 Received: from www.linutronix.de ([62.245.132.108]:55963 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753263AbbGMUqB (ORCPT ); Mon, 13 Jul 2015 16:46:01 -0400 Message-Id: <20150713200714.511675588@linutronix.de> User-Agent: quilt/0.63-1 Date: Mon, 13 Jul 2015 20:45:53 -0000 From: Thomas Gleixner To: LKML Cc: Ralf Baechle , Jiang Liu , linux-mips@linux-mips.org, Russell King , Julia Lawall Subject: [patch 01/12] MIPS/jz4740: Consolidate chained IRQ handler install/remove References: <20150713200602.799079101@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Disposition: inline; filename=MIPS-jz4740-Consolidate-chained-IRQ-handler-install-.patch X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001,URIBL_BLOCKED=0.001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King Signed-off-by: Thomas Gleixner Cc: Julia Lawall Cc: Ralf Baechle Cc: linux-mips@linux-mips.org --- arch/mips/jz4740/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Index: tip/arch/mips/jz4740/gpio.c =================================================================== --- tip.orig/arch/mips/jz4740/gpio.c +++ tip/arch/mips/jz4740/gpio.c @@ -423,8 +423,8 @@ static void jz4740_gpio_chip_init(struct chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100); chip->irq = JZ4740_IRQ_INTC_GPIO(id); - irq_set_handler_data(chip->irq, chip); - irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler); + irq_set_chained_handler_and_data(chip->irq, + jz_gpio_irq_demux_handler, chip); gc = irq_alloc_generic_chip(chip->gpio_chip.label, 1, chip->irq_base, chip->base, handle_level_irq);