From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753334AbbGMUrR (ORCPT ); Mon, 13 Jul 2015 16:47:17 -0400 Received: from www.linutronix.de ([62.245.132.108]:56013 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753992AbbGMUqN (ORCPT ); Mon, 13 Jul 2015 16:46:13 -0400 Message-Id: <20150713200715.209383043@linutronix.de> User-Agent: quilt/0.63-1 Date: Mon, 13 Jul 2015 20:46:06 -0000 From: Thomas Gleixner To: LKML Cc: Ralf Baechle , Jiang Liu , linux-mips@linux-mips.org Subject: [patch 09/12] MIPS/ath91: Remove pointless irqdisable/enable References: <20150713200602.799079101@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Disposition: inline; filename=MIPS-ath91--Remove-pointless-irqdisable-enable.patch X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001,URIBL_BLOCKED=0.001 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The various interrupt flow handlers in ath79 are cascading interrupt handlers. They all have a disable_irq_nosync()/enable_irq() pair around the generic_handle_irq() call. The value of this disable/enable is zero because its a complete noop: disable_irq_nosync() merily increments the disable count without actually masking the interrupt. enable_irq() soleley decrements the disable count without touching the interrupt chip. The interrupt cannot arrive again because the complete call chain runs with interrupts disabled. Remove it. Signed-off-by: Thomas Gleixner Cc: Ralf Baechle Cc: linux-mips@linux-mips.org --- arch/mips/ath79/irq.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-) Index: tip/arch/mips/ath79/irq.c =================================================================== --- tip.orig/arch/mips/ath79/irq.c +++ tip/arch/mips/ath79/irq.c @@ -124,8 +124,6 @@ static void ar934x_ip2_irq_dispatch(unsi { u32 status; - disable_irq_nosync(irq); - status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS); if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) { @@ -137,8 +135,6 @@ static void ar934x_ip2_irq_dispatch(unsi } else { spurious_interrupt(); } - - enable_irq(irq); } static void ar934x_ip2_irq_init(void) @@ -157,14 +153,12 @@ static void qca955x_ip2_irq_dispatch(uns { u32 status; - disable_irq_nosync(irq); - status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL; if (status == 0) { spurious_interrupt(); - goto enable; + return; } if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) { @@ -176,17 +170,12 @@ static void qca955x_ip2_irq_dispatch(uns /* TODO: flush DDR? */ generic_handle_irq(ATH79_IP2_IRQ(1)); } - -enable: - enable_irq(irq); } static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc) { u32 status; - disable_irq_nosync(irq); - status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); status &= QCA955X_EXT_INT_PCIE_RC2_ALL | QCA955X_EXT_INT_USB1 | @@ -194,7 +183,7 @@ static void qca955x_ip3_irq_dispatch(uns if (status == 0) { spurious_interrupt(); - goto enable; + return; } if (status & QCA955X_EXT_INT_USB1) { @@ -211,9 +200,6 @@ static void qca955x_ip3_irq_dispatch(uns /* TODO: flush DDR? */ generic_handle_irq(ATH79_IP3_IRQ(2)); } - -enable: - enable_irq(irq); } static void qca955x_irq_init(void)