From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751434AbbG0KWv (ORCPT ); Mon, 27 Jul 2015 06:22:51 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([146.101.78.143]:27390 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751217AbbG0KWt convert rfc822-to-8bit (ORCPT ); Mon, 27 Jul 2015 06:22:49 -0400 Date: Mon, 27 Jul 2015 11:22:45 +0100 From: Catalin Marinas To: "Zhang, Jonathan Zhixiong" Cc: Will Deacon , "fu.wei@linaro.org" , "al.stone@linaro.org" , "bp @ alien8 . de Matt Fleming" , "rjw@rjwysocki.net" , "linux-kernel@vger.kernel.org" , "linaro-acpi@lists.linaro.org" Subject: Re: [PATCH V7 3/5] arm64: mm: add PROT_DEVICE_nGnRnE and PROT_NORMAL_WT Message-ID: <20150727102245.GC29945@e104818-lin.cambridge.arm.com> References: <1437515960-16812-1-git-send-email-zjzhang@codeaurora.org> <1437515960-16812-4-git-send-email-zjzhang@codeaurora.org> <20150724161500.GV3550@e104818-lin.cambridge.arm.com> <55B28BD4.2050403@codeaurora.org> MIME-Version: 1.0 In-Reply-To: <55B28BD4.2050403@codeaurora.org> User-Agent: Mutt/1.5.23 (2014-03-12) X-OriginalArrivalTime: 27 Jul 2015 10:22:45.0755 (UTC) FILETIME=[2DF57CB0:01D0C856] X-MC-Unique: D0BLaxdoQwWxbU3CBBSFmg-1 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 24, 2015 at 08:02:44PM +0100, Zhang, Jonathan Zhixiong wrote: > On 7/24/2015 9:15 AM, Catalin Marinas wrote: > > On Tue, Jul 21, 2015 at 10:59:18PM +0100, Jonathan (Zhixiong) Zhang wrote: > >> #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE)) > >> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S > >> index 838266f5b056..23e265d732f8 100644 > >> --- a/arch/arm64/mm/proc.S > >> +++ b/arch/arm64/mm/proc.S > >> @@ -294,7 +294,7 @@ ENTRY(__cpu_setup) > >> msr cpacr_el1, x0 // Enable FP/ASIMD > >> msr mdscr_el1, xzr // Reset mdscr_el1 > >> /* > >> - * Memory region attributes for LPAE: > >> + * Memory region attributes for LPAE and EFI: > > > > LPAE refers to the page table format, the comment probably inherited > > from arch/arm. EFI means a completely different thing, so please remove > > it. > Yes, it was inherited from arch/arm/mm/proc-v7-3level.S. I'll remove > the change. That being said, the original statement is not totally > accurate I think, so if you prefer, I could change it like following. > - * Memory region attributes for LPAE: > + * Set MAIR with memory region attributes: The LPAE is not inaccurate, just superfluous (since that's the only format supported by AArch64). -- Catalin