From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753287AbbG1PNV (ORCPT ); Tue, 28 Jul 2015 11:13:21 -0400 Received: from down.free-electrons.com ([37.187.137.238]:38070 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751756AbbG1PNT (ORCPT ); Tue, 28 Jul 2015 11:13:19 -0400 Date: Tue, 28 Jul 2015 17:13:16 +0200 From: Boris Brezillon To: Boris Brezillon Cc: Hans de Goede , Michal Suchanek , David Woodhouse , Brian Norris , Petros Angelatos , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/2] New NAND chip IDs Message-ID: <20150728171316.67bb4351@bbrezillon> In-Reply-To: <20150728171013.58cbc608@bbrezillon> References: <55B79696.40906@redhat.com> <20150728171013.58cbc608@bbrezillon> X-Mailer: Claws Mail 3.9.3 (GTK+ 2.24.23; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 28 Jul 2015 17:10:13 +0200 Boris Brezillon wrote: > Hi Hans, > > On Tue, 28 Jul 2015 16:49:58 +0200 > Hans de Goede wrote: > > > Hi, > > > > On 07/28/2015 04:29 PM, Michal Suchanek wrote: > > > Hello, > > > > > > the NAND chips on Cubietech boards are not known to Linux. > > > > > > I used Petros Angelatos' patch from sunxi experimental tree for one chip and > > > added another chip. > > > > > > I hope it's ok to send both patches to avoid merge conflict. > > > > I do not think that these patches are a good idea, this will lead to an > > ever growing manual maintained list of ids, and that is not maintainable > > IMHO. > > > > For Samsung chips we only need the ecc strength and size the rest is already > > detected on the fly, and I've a patch in my personal tree to get the > > ecc strengt and size from the nand without needing to have an entry per > > chip: > > > > https://github.com/jwrdegoede/linux-sunxi/commit/53b335d33232753b7aa70298009158baadf5a6bf > > > > This is IMHO a much better solution. > > Hm, IMHO it's not: the nand ids table also store information about > supported NAND timings, and maybe we'll have to add new things (like > the read-retry implementation to use for a specific chip). Oops, sorry, I didn't look at the patch before answering, and I thought you were suggesting to put the information inside the DT. Forget my previous answer. -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com