From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753891AbbIRNzF (ORCPT ); Fri, 18 Sep 2015 09:55:05 -0400 Received: from casper.infradead.org ([85.118.1.10]:43459 "EHLO casper.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751823AbbIRNzD (ORCPT ); Fri, 18 Sep 2015 09:55:03 -0400 Date: Fri, 18 Sep 2015 15:49:37 +0200 From: Peter Zijlstra To: Oleg Nesterov Cc: Dmitry Vyukov , Will Deacon , "ebiederm@xmission.com" , Al Viro , Andrew Morton , Ingo Molnar , Paul McKenney , "mhocko@suse.cz" , LKML , "ktsan@googlegroups.com" , Kostya Serebryany , Andrey Konovalov , Alexander Potapenko , Hans Boehm Subject: Re: [PATCH] kernel: fix data race in put_pid Message-ID: <20150918134937.GX3816@twins.programming.kicks-ass.net> References: <20150917174456.GA30178@redhat.com> <20150917180919.GA32116@redhat.com> <20150918085156.GS3816@twins.programming.kicks-ass.net> <20150918092820.GA27377@arm.com> <20150918112252.GT3816@twins.programming.kicks-ass.net> <20150918115637.GM3604@twins.programming.kicks-ass.net> <20150918134453.GA11630@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20150918134453.GA11630@redhat.com> User-Agent: Mutt/1.5.21 (2012-12-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 18, 2015 at 03:44:53PM +0200, Oleg Nesterov wrote: > On 09/18, Peter Zijlstra wrote: > > +static inline int atomic_read_ctrl(atomic_t *v) > > +{ > > + int val = atomic_read(v); > > + smp_read_barrier_depends(); /* Enforce control dependency. */ > > + return val; > > +} > > Help. I am starting to think that the control dependencies is even more > hard to understand that memory barriers... Hehe, think of then as a load-store barrier; due to the 'impossibility' of speculative stores (we'd see all kinds of random crap if you could speculate stores). > So I assume that if we have > > int X = 0; > atomic_t Y = ATOMIC_INIT(0); > > void w(void) > { > X = 1; > atomic_inc_return(&Y); > } > > then > > void r(void) > { > if (atomic_read_ctrl(&Y)) > BUG_ON(X == 0); > } > > should be correct? Why? Nope, because its (again) a load-load order you have there.