Re: [PATCH 01/25] perf auxtrace: Fix 'instructions' period of zero

[Arnaldo Carvalho de Melo <acme@kernel.org>]

Em Mon, Sep 28, 2015 at 11:12:16AM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Fri, Sep 25, 2015 at 04:15:32PM +0300, Adrian Hunter escreveu:
> > Instruction tracing options (i.e. --itrace) include an option for
> > sampling instructions at an arbitrary period. e.g.
> > 
> > 	--itrace=i10us
> > 
> > means make an 'instructions' sample for every 10us of trace.
> > 
> > Currently the logic does not distinguish between a period of
> > zero and no period being specified at all, so it gets treated
> > as the default period which is 100000.  That doesn't really
> > make sense.
> > 
> > Fix it so that zero period is accepted and treated as meaning
> > "as often as possible".
> 
> Don't we have to update the documentation for this?
>  
> > In the case of Intel PT that is the same as a period of 1 and
> > a unit of 'instructions' (i.e. --itrace=i1i).

I.e. may I fold the following patch into this one? Should we update the
per tool man page?

diff --git a/tools/perf/Documentation/intel-pt.txt b/tools/perf/Documentation/intel-pt.txt
index 4a0501d7a3b4..05707d9bfdda 100644
--- a/tools/perf/Documentation/intel-pt.txt
+++ b/tools/perf/Documentation/intel-pt.txt
@@ -722,6 +722,11 @@ on the sample is *not* adjusted and reflects the last known value of TSC.
 
 For Intel PT, the default period is 100us.
 
+Setting it to a zero period means "as often as possible".
+
+In the case of Intel PT that is the same as a period of 1 and a unit of
+'instructions' (i.e. --itrace=i1i).
+
 Also the call chain size (default 16, max. 1024) for instructions or
 transactions events can be specified. e.g.