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Date: Mon, 12 Oct 2015 09:57:35 +0100
From: Liviu Dudau <Liviu.Dudau@arm.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Will Deacon <will.deacon@arm.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Mark Rutland <mark.rutland@arm.com>,
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        Robin Murphy <robin.murphy@arm.com>, Rob Herring <robh+dt@kernel.org>,
        Ian Campbell <ijc+devicetree@hellion.org.uk>,
        Kumar Gala <galak@codeaurora.org>, Jon Medhurst <tixy@linaro.org>,
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Subject: Re: [PATCH v2 2/5] PCI: Add quirk for PLDA's XpressRICH3 host bridge
 class.
Message-ID: <20151012085735.GJ3394@e106497-lin.cambridge.arm.com>
References: <1444409849-5685-1-git-send-email-Liviu.Dudau@arm.com>
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 <7335872.olmykfZgj7@wuerfel>
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On Fri, Oct 09, 2015 at 08:32:07PM +0200, Arnd Bergmann wrote:
> On Friday 09 October 2015 17:57:26 Liviu Dudau wrote:
> > +/*
> > + * The PLDA's XpressRICH3 doesn't describe itself as a bridge. This is required
> > + * for correct/normal enumeration.
> > + */
> > +static void xr3pci_quirk_class(struct pci_dev *pdev)
> > +{
> > +       pdev->class = PCI_CLASS_BRIDGE_PCI << 8;
> > +}
> > +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLDA, PCI_DEVICE_ID_XR3PCI, xr3pci_quirk_class);
> > 
> 
> Are you sure that this device ID is only used for the host bridge, not
> for related devices in endpoint mode?

I would hope so. The device ID has been assigned to ARM's implementation by PLDA,
it would be logical not to be reused for anyone else's.

> 
> While we don't support PCIe endpoint drivers at the moment, it might
> happen at some point and then things break when someone tries to
> plug a machine with this ID into a Linux host.

I'm asking for confirmation inside ARM that the IDs are uniquely allocated to Juno
and will come back when I'll get confirmation.

Best regards,
Liviu

> 
> 	Arnd
> 

-- 
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