From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753081AbbJKXTQ (ORCPT ); Sun, 11 Oct 2015 19:19:16 -0400 Received: from ozlabs.org ([103.22.144.67]:40819 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752517AbbJKXTO (ORCPT ); Sun, 11 Oct 2015 19:19:14 -0400 Date: Mon, 12 Oct 2015 10:19:12 +1100 From: Stephen Rothwell To: Andy Gross , Olof Johansson , Arnd Bergmann , Cc: linux-next@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla , Sjoerd Simons Subject: linux-next: manual merge of the qcom tree with the arm-soc tree Message-ID: <20151012101912.33e77590@canb.auug.org.au> X-Mailer: Claws Mail 3.12.0 (GTK+ 2.24.28; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Andy, Today's linux-next merge of the qcom tree got a conflict in: arch/arm/configs/multi_v7_defconfig between commits: b605aded4491 ("ARM: multi_v7_defconfig: Add missing QCOM APQ8064 configs") cc68819a582c ("ARM: multi_v7_defconfig: Enable Rockchip display support") from the arm-soc tree and commit: 4e7fb93081f8 ("ARM: multi_v7_defconfig: Enable QCOM SMD/RPM") from the qcom tree. I fixed it up (see below) and can carry the fix as necessary (no action is required). -- Cheers, Stephen Rothwell sfr@canb.auug.org.au diff --cc arch/arm/configs/multi_v7_defconfig index 0af319ec7047,41aecd75e2aa..000000000000 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@@ -425,7 -415,7 +425,8 @@@ CONFIG_REGULATOR_MAX77802= CONFIG_REGULATOR_PALMAS=y CONFIG_REGULATOR_PBIAS=y CONFIG_REGULATOR_PWM=m +CONFIG_REGULATOR_QCOM_RPM=y + CONFIG_REGULATOR_QCOM_SMD_RPM=y CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S5M8767=y CONFIG_REGULATOR_TPS51632=y @@@ -645,7 -631,7 +649,8 @@@ CONFIG_APQ_MMCC_8084= CONFIG_MSM_GCC_8660=y CONFIG_MSM_MMCC_8960=y CONFIG_MSM_MMCC_8974=y +CONFIG_ROCKCHIP_IOMMU=y + CONFIG_HWSPINLOCK_QCOM=y CONFIG_TEGRA_IOMMU_GART=y CONFIG_TEGRA_IOMMU_SMMU=y CONFIG_PM_DEVFREQ=y