From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752803AbbJLQdv (ORCPT ); Mon, 12 Oct 2015 12:33:51 -0400 Received: from mail-bn1on0084.outbound.protection.outlook.com ([157.56.110.84]:22912 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751101AbbJLQds (ORCPT ); Mon, 12 Oct 2015 12:33:48 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; ettus.com; dkim=none (message not signed) header.d=none;ettus.com; dmarc=bestguesspass action=none header.from=xilinx.com; Date: Mon, 12 Oct 2015 09:33:41 -0700 From: =?utf-8?B?U8O2cmVu?= Brinkmann To: Moritz Fischer CC: , , , , , , , , , , , , Subject: Re: [PATCH 1/3] doc: dt: fpga: Added Documentation for Xilinx Zynq FPGA manager. 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Currently, there is only one clock input, so a match without specifying a clock name should work making this optional. But in your implementation, you do specify a clock name in devm_clk_get(). I'm not entirely sure, but that call might fail if it doesn't find the corresponding clock-names property. I think, either we should make this required and list the required entries here. Or the implementation probably needs to drop the clock name when looking up its input clock. Sören