From: Peter Zijlstra <peterz@infradead.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: Andi Kleen <ak@linux.intel.com>,
linux-kernel@vger.kernel.org, Ingo Molnar <mingo@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH] x86, perf: Use INST_RETIRED.PREC_DIST for cycles:pp on Skylake
Date: Wed, 21 Oct 2015 20:57:35 +0200 [thread overview]
Message-ID: <20151021185735.GB2508@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <20151021165542.GN3533@two.firstfloor.org>
On Wed, Oct 21, 2015 at 06:55:42PM +0200, Andi Kleen wrote:
> On Wed, Oct 21, 2015 at 06:52:52PM +0200, Peter Zijlstra wrote:
> > On Wed, Oct 21, 2015 at 08:26:08AM -0700, Andi Kleen wrote:
> > > So it turns out that UOPS_RETIRED.ALL+pebs only works by accident
> > > on Skylake. It's not in the specification.
> >
> > Accident or not, it works and you've tested it. Might as well keep it.
> > Specs can be updated.
>
> No, it's better not to use it.
This is really rather unfortunate; what is the failure mode?
> > Also, even with the SNB 'hickup' they still haven't got the memo that
> > cycles is important for PEBS ?
>
> INST_RETIRED.PREC_DIST is a far better cycles than UOPS_RETIRED.ALL
> (see my earlier example)
If you only want the one counter, yes.
And since you made me look at the SDM; it looks like our skl pebs table
isn't anything like the table there. Also, do the events BR_INST_RETIRED
have a composable umask? That is, .event=0xc4, .umask=41 is valid and
would be 'conditional far branches'.
The same would be true for the HSW/BDW table I suppose, the memops
retired stuff looks composable but we currently do not allow that.
prev parent reply other threads:[~2015-10-21 18:57 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-19 22:58 Andi Kleen
2015-10-20 11:36 ` Peter Zijlstra
2015-10-20 22:28 ` Andi Kleen
2015-10-21 8:09 ` Peter Zijlstra
2015-10-21 15:26 ` Andi Kleen
2015-10-21 16:52 ` Peter Zijlstra
2015-10-21 16:55 ` Andi Kleen
2015-10-21 18:57 ` Peter Zijlstra [this message]
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