From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754511AbbKJRAT (ORCPT ); Tue, 10 Nov 2015 12:00:19 -0500 Received: from bombadil.infradead.org ([198.137.202.9]:45801 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751202AbbKJRAS (ORCPT ); Tue, 10 Nov 2015 12:00:18 -0500 Date: Tue, 10 Nov 2015 18:00:10 +0100 From: Peter Zijlstra To: Jacob Pan Cc: LKML , Rafael Wysocki , Len Brown , Andi Kleen , Thomas Gleixner , Paul Turner , Tim Chen , Dietmar Eggemann , Eduardo Valentin , Punit Agrawal , Srinivas Pandruvada Subject: Re: [RFC PATCH v2 3/3] sched: introduce synchronized idle injection Message-ID: <20151110170010.GH17308@twins.programming.kicks-ass.net> References: <1447114883-23851-1-git-send-email-jacob.jun.pan@linux.intel.com> <1447114883-23851-4-git-send-email-jacob.jun.pan@linux.intel.com> <20151110132324.GC17308@twins.programming.kicks-ass.net> <20151110060116.26cd5ff8@yairi> <20151110145823.GD17308@twins.programming.kicks-ass.net> <20151110082859.1493f106@icelake> <20151110163646.GG17308@twins.programming.kicks-ass.net> <20151110085055.67bdb1fa@icelake> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20151110085055.67bdb1fa@icelake> User-Agent: Mutt/1.5.21 (2012-12-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 10, 2015 at 08:50:55AM -0800, Jacob Pan wrote: > On Tue, 10 Nov 2015 17:36:46 +0100 > Peter Zijlstra wrote: > > > > The downside is that we need to restart the timers every time if > > > user were to change injection parameters, i.e. duration and percent. > > > Or do locking which might be too expensive. In the previous > > > approach, it will naturally catch up the parameter change. > > > > Why? the timer will fire and observe the new value for reprogramming > > the next period. All you need to do is to ensure whole values are > > written/read -- ie. avoid load/store tearing. > Different per CPU timer may intercept parameter changes at slightly > different time, so there is a race condition such that some CPUs may > catch the period change later by one period, which results in a correct > period change but at a different time, i.e. out of sync. Ah yes. So if the locking hurts I can come up with a lockless algorithm for this. Shouldn't be too hard.