From: Peter Zijlstra <peterz@infradead.org>
To: "Liang, Kan" <kan.liang@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"hpa@zytor.com" <hpa@zytor.com>,
"torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
"acme@kernel.org" <acme@kernel.org>,
"mingo@kernel.org" <mingo@kernel.org>,
"paulus@samba.org" <paulus@samba.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"linux-tip-commits@vger.kernel.org"
<linux-tip-commits@vger.kernel.org>
Subject: Re: [tip:perf/core] perf: Add pmu specific data for perf task context
Date: Wed, 9 Dec 2015 16:14:28 +0100 [thread overview]
Message-ID: <20151209151428.GQ6356@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <37D7C6CF3E00A74B8858931C1DB2F077019AAE28@SHSMSX103.ccr.corp.intel.com>
On Wed, Dec 09, 2015 at 02:59:21PM +0000, Liang, Kan wrote:
> > diff --git a/kernel/events/core.c b/kernel/events/core.c index
> > 36babfd..97aa610 100644
> > --- a/kernel/events/core.c
> > +++ b/kernel/events/core.c
> > @@ -3508,11 +3515,6 @@ retry:
> > if (!ctx)
> > goto errout;
> >
> > - if (task_ctx_data) {
> > - ctx->task_ctx_data = task_ctx_data;
> > - task_ctx_data = NULL;
> > - }
> > -
> > err = 0;
> > mutex_lock(&task->perf_event_mutex);
> > /*
> > @@ -3526,6 +3528,10 @@ retry:
> > else {
> > get_ctx(ctx);
> > ++ctx->pin_count;
> > + if (task_ctx_data) {
> > + ctx->task_ctx_data = task_ctx_data;
> > + task_ctx_data = NULL;
> > + }
> > rcu_assign_pointer(task->perf_event_ctxp[ctxn],
> > ctx);
> > }
> > mutex_unlock(&task->perf_event_mutex);
> >
> >
> > Does that make sense? No point in setting task_ctx_data if we're going to
> > free the ctx and try again.
>
> The task_ctx_data will be checked before use. So it wouldn't crash the
> system if it's NULL.
Yeah, I know, I checked :-)
> The problem is that LBR stack info will not be save/store on context
> switch anymore. The user probably get wrong call stack information.
Yep
> May I know why you want to do that?
Because this seemed like a less fragile construct. When there's multiple
event creations racing it seems possible (ableit entirely unlikely) to
assign the allocated task_ctx_data to a ctx that we'll delete, and on
the second go around re-allocate a ctx, but are left wihtout
task_ctx_data to assign to it.
So by only assigning the task_ctx_data when we _know_ we've succeeded,
we'll avoid this scenario.
next prev parent reply other threads:[~2015-12-09 15:14 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-05 2:55 [PATCH V7 00/17] perf, x86: Haswell LBR call stack support Kan Liang
2014-11-05 2:55 ` [PATCH V7 01/17] perf, x86: Reduce lbr_sel_map size Kan Liang
2015-02-18 17:13 ` [tip:perf/core] perf/x86/intel: Reduce lbr_sel_map[] size tip-bot for Yan, Zheng
2014-11-05 2:55 ` [PATCH V7 02/17] perf, core: introduce pmu context switch callback Kan Liang
2015-02-18 17:14 ` [tip:perf/core] perf: Introduce " tip-bot for Yan, Zheng
2014-11-05 2:55 ` [PATCH V7 03/17] perf, x86: use context switch callback to flush LBR stack Kan Liang
2015-02-18 17:14 ` [tip:perf/core] perf/x86/intel: Use " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 04/17] perf, x86: Basic Haswell LBR call stack support Kan Liang
2015-02-18 17:14 ` [tip:perf/core] perf/x86/intel: Add basic " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 05/17] perf, core: pmu specific data for perf task context Kan Liang
2015-02-18 17:15 ` [tip:perf/core] perf: Add " tip-bot for Yan, Zheng
2015-12-09 8:34 ` Peter Zijlstra
2015-12-09 14:59 ` Liang, Kan
2015-12-09 15:14 ` Peter Zijlstra [this message]
2015-12-09 15:25 ` Liang, Kan
2014-11-05 2:56 ` [PATCH V7 06/17] perf, core: always switch pmu specific data during context switch Kan Liang
2015-02-18 17:15 ` [tip:perf/core] perf: Always " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 07/17] perf, x86: allocate space for storing LBR stack Kan Liang
2015-02-18 17:15 ` [tip:perf/core] perf/x86/intel: Allocate " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 08/17] perf, x86: track number of events that use LBR callstack Kan Liang
2015-02-18 17:15 ` [tip:perf/core] perf/x86/intel: Track number of events that use the " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 09/17] perf, x86: Save/resotre LBR stack during context switch Kan Liang
2015-02-18 17:16 ` [tip:perf/core] perf/x86/intel: Save/ restore " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 10/17] perf, core: simplify need branch stack check Kan Liang
2015-02-18 17:16 ` [tip:perf/core] perf: Simplify the " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 11/17] perf, core: expose LBR call stack to user perf tool Kan Liang
2014-11-05 9:20 ` Peter Zijlstra
2014-11-05 2:56 ` [PATCH V7 12/17] perf, x86: re-organize code that implicitly enables LBR/PEBS Kan Liang
2015-02-18 17:16 ` [tip:perf/core] perf/x86/intel: Re-organize " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 13/17] perf, x86: enable LBR callstack when recording callchain Kan Liang
2014-11-05 9:21 ` Peter Zijlstra
2014-11-05 9:58 ` Stephane Eranian
2014-11-05 10:43 ` Peter Zijlstra
2014-11-05 10:57 ` Stephane Eranian
2014-11-05 12:49 ` Peter Zijlstra
2014-11-05 13:22 ` Stephane Eranian
2014-11-05 15:45 ` Peter Zijlstra
2014-11-05 15:53 ` Liang, Kan
2014-11-05 16:29 ` Peter Zijlstra
2014-11-05 17:52 ` Andi Kleen
2014-11-05 17:57 ` Andi Kleen
2014-11-05 17:40 ` Andi Kleen
2014-11-05 2:56 ` [PATCH V7 14/17] perf, x86: disable FREEZE_LBRS_ON_PMI when LBR operates in callstack mode Kan Liang
2015-02-18 17:17 ` [tip:perf/core] perf/x86/intel: Disable " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 15/17] perf, x86: Discard zero length call entries in LBR call stack Kan Liang
2015-02-18 17:17 ` [tip:perf/core] perf/x86/intel: " tip-bot for Yan, Zheng
2014-11-05 2:56 ` [PATCH V7 16/17] perf tools: handle LBR call stack data Kan Liang
2014-11-05 2:56 ` [PATCH V7 17/17] perf tools: choose to dump callchain from LBR and FP Kan Liang
2014-11-05 9:37 ` [PATCH V7 00/17] perf, x86: Haswell LBR call stack support Peter Zijlstra
2014-11-05 16:22 ` Liang, Kan
2014-11-05 16:27 ` Peter Zijlstra
2014-11-05 17:02 ` Liang, Kan
2015-02-18 17:17 ` [tip:perf/core] perf/x86/intel: Expose LBR callstack to user space tooling tip-bot for Peter Zijlstra
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