From: Mark Brown <broonie@kernel.org>
To: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: stefan@agner.ch, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] spi-fsl-dspi: Fix CTAR Register access
Date: Wed, 9 Dec 2015 20:41:03 +0000 [thread overview]
Message-ID: <20151209204103.GJ5727@sirena.org.uk> (raw)
In-Reply-To: <1449642099-13045-1-git-send-email-bhuvanchandra.dv@toradex.com>
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On Wed, Dec 09, 2015 at 11:51:39AM +0530, Bhuvanchandra DV wrote:
> DSPI instances in Vybrid have a different amount of chip selects
> and CTARs (Clock and transfer Attributes Register). In case of
> DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
This doesn't apply against, current code - please check and resend.
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next prev parent reply other threads:[~2015-12-09 20:41 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-09 6:21 Bhuvanchandra DV
2015-12-09 20:41 ` Mark Brown [this message]
2015-12-10 4:42 ` Bhuvanchandra DV
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