From: Peter Zijlstra <peterz@infradead.org>
To: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>,
Andrew Pinski <andrew.pinski@caviumnetworks.com>,
Davidlohr Bueso <dbueso@suse.de>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
david.daney@cavium.com
Subject: Re: FW: Commit 81a43adae3b9 (locking/mutex: Use acquire/release semantics) causing failures on arm64 (ThunderX)
Date: Mon, 14 Dec 2015 21:28:55 +0100 [thread overview]
Message-ID: <20151214202855.GX6357@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <20151211223540.GA22277@linux.vnet.ibm.com>
On Fri, Dec 11, 2015 at 02:35:40PM -0800, Paul E. McKenney wrote:
> On Fri, Dec 11, 2015 at 02:48:03PM +0100, Peter Zijlstra wrote:
> > On Fri, Dec 11, 2015 at 01:33:14PM +0000, Will Deacon wrote:
> > > On Fri, Dec 11, 2015 at 01:26:47PM +0100, Peter Zijlstra wrote:
> >
> > > > While we're there, the acquire in osq_wait_next() seems somewhat ill
> > > > documented too.
> > > >
> > > > I _think_ we need ACQUIRE semantics there because we want to strictly
> > > > order the lock-unqueue A,B,C steps and we get that with:
> > > >
> > > > A: SC
> > > > B: ACQ
> > > > C: Relaxed
> > > >
> > > > Similarly for unlock we want the WRITE_ONCE to happen after
> > > > osq_wait_next, but in that case we can even rely on the control
> > > > dependency there.
> > >
> > > Even for the lock-unqueue case, isn't B->C ordered by a control dependency
> > > because C consists only of stores?
> >
> > Hmm, indeed. So we could go fully relaxed on it I suppose, since the
> > same is true for the unlock site.
>
> I am probably missing quite a bit on this thread, but don't x86 MMIO
> accesses to frame buffers need to interact with something more heavyweight
> than an x86 release store or acquire load in order to remain confined
> to the resulting critical section?
So on x86 there really isn't a problem because every atomic op (and
there's plenty here) will be a full barrier.
That is, even if you were to replace everything with _relaxed() ops, it
would still work as 'expected' on x86.
ppc/arm64 will crash and burn, but that's another story.
But the important point here was that osq_wait_next() is never relied
upon to provide either the ACQUIRE semantics for osq_lock() not the
RELEASE semantics for osq_unlock(). Those are provided by other ops.
next prev parent reply other threads:[~2015-12-14 20:29 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-10 19:43 David Daney
[not found] ` <SN1PR07MB21577C72379C8440A208D6BC9EEA0@SN1PR07MB2157.namprd07.prod.outlook.com>
2015-12-11 3:29 ` FW: " Andrew Pinski
2015-12-11 4:51 ` Andrew Pinski
2015-12-11 8:41 ` Peter Zijlstra
2015-12-11 12:04 ` Will Deacon
2015-12-11 12:13 ` Peter Zijlstra
2015-12-11 12:18 ` Will Deacon
2015-12-11 12:26 ` Peter Zijlstra
2015-12-11 13:33 ` Will Deacon
2015-12-11 13:48 ` Peter Zijlstra
2015-12-11 14:06 ` Will Deacon
2015-12-11 17:11 ` Peter Zijlstra
2015-12-11 17:24 ` Will Deacon
2015-12-11 22:35 ` Paul E. McKenney
2015-12-14 18:49 ` One Thousand Gnomes
2015-12-14 20:31 ` Peter Zijlstra
2015-12-15 4:36 ` Paul E. McKenney
2015-12-14 20:28 ` Peter Zijlstra [this message]
2015-12-15 4:36 ` FW: " Paul E. McKenney
2015-12-11 14:17 ` Davidlohr Bueso
2015-12-17 21:52 ` Jeremy Linton
2015-12-11 7:33 ` Peter Zijlstra
2015-12-11 9:59 ` Will Deacon
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