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From: Huang Shijie <shijie.huang@arm.com>
To: Han Xu <b45815@freescale.com>
Cc: <dwmw2@infradead.org>, <computersforpeace@gmail.com>,
	<boris.brezillon@free-electrons.com>,
	<fabio.estevam@freescale.com>, <hofrat@osadl.org>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<vinod.koul@intel.com>, <dan.j.williams@intel.com>,
	<dmaengine@vger.kernel.org>
Subject: Re: [PATCH v8 4/7] mtd: nand: gpmi: may use minimum required ecc for 744 oobsize NAND
Date: Thu, 17 Dec 2015 02:10:06 +0000	[thread overview]
Message-ID: <20151217021005.GC631@robwan01-pc.asiapac.arm.com> (raw)
In-Reply-To: <1449096466-18064-5-git-send-email-b45815@freescale.com>

On Wed, Dec 02, 2015 at 04:47:43PM -0600, Han Xu wrote:
> By default NAND driver will choose the highest ecc strength that oob
> could contain, in this case, for some 8K+744 NAND flash, the ecc
> strength will be up to 52bit, which beyonds the i.MX6QDL BCH capability
> (40bit).
>
> This patch allows the NAND driver try to use minimum required ecc
> strength if it failed to use the highest ecc, even without explicitly
> claiming "fsl,use-minimum-ecc" in dts.
>
> Signed-off-by: Han Xu <b45815@freescale.com>
> ---
>  drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 26 ++++++++++++++------------
>  1 file changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
> index ba5975f..298c1d1 100644
> --- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
> +++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
> @@ -136,7 +136,7 @@ static inline bool gpmi_check_ecc(struct gpmi_nand_data *this)
>   *
>   * We may have available oob space in this case.
>   */
> -static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this)
> +static int set_geometry_by_ecc_info(struct gpmi_nand_data *this)
>  {
>       struct bch_geometry *geo = &this->bch_geometry;
>       struct mtd_info *mtd = &this->mtd;
> @@ -145,7 +145,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this)
>       unsigned int block_mark_bit_offset;
>
>       if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
> -             return false;
> +             return -EINVAL;
>
>       switch (chip->ecc_step_ds) {
>       case SZ_512:
> @@ -158,19 +158,19 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this)
>               dev_err(this->dev,
>                       "unsupported nand chip. ecc bits : %d, ecc size : %d\n",
>                       chip->ecc_strength_ds, chip->ecc_step_ds);
> -             return false;
> +             return -EINVAL;
>       }
>       geo->ecc_chunk_size = chip->ecc_step_ds;
>       geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
>       if (!gpmi_check_ecc(this))
> -             return false;
> +             return -EINVAL;
>
>       /* Keep the C >= O */
>       if (geo->ecc_chunk_size < mtd->oobsize) {
>               dev_err(this->dev,
>                       "unsupported nand chip. ecc size: %d, oob size : %d\n",
>                       chip->ecc_step_ds, mtd->oobsize);
> -             return false;
> +             return -EINVAL;
>       }
>
>       /* The default value, see comment in the legacy_set_geometry(). */
> @@ -242,7 +242,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this)
>                               + ALIGN(geo->ecc_chunk_count, 4);
>
>       if (!this->swap_block_mark)
> -             return true;
> +             return 0;
>
>       /* For bit swap. */
>       block_mark_bit_offset = mtd->writesize * 8 -
> @@ -251,7 +251,7 @@ static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this)
>
>       geo->block_mark_byte_offset = block_mark_bit_offset / 8;
>       geo->block_mark_bit_offset  = block_mark_bit_offset % 8;
> -     return true;
> +     return 0;
>  }
>
>  static int legacy_set_geometry(struct gpmi_nand_data *this)
> @@ -285,7 +285,8 @@ static int legacy_set_geometry(struct gpmi_nand_data *this)
>       geo->ecc_strength = get_ecc_strength(this);
>       if (!gpmi_check_ecc(this)) {
>               dev_err(this->dev,
> -                     "required ecc strength of the NAND chip: %d is not supported by the GPMI controller (%d)\n",
> +                     "ecc strength: %d cannot be supported by the controller (%d)\n"
> +                     "try to use minimum ecc strength that NAND chip required\n",
>                       geo->ecc_strength,
>                       this->devdata->bch_max_ecc_strength);
>               return -EINVAL;
> @@ -366,10 +367,11 @@ static int legacy_set_geometry(struct gpmi_nand_data *this)
>
>  int common_nfc_set_geometry(struct gpmi_nand_data *this)
>  {
> -     if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")
> -             && set_geometry_by_ecc_info(this))
> -             return 0;
> -     return legacy_set_geometry(this);
> +     if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc"))
> +                             || legacy_set_geometry(this))
> +             return set_geometry_by_ecc_info(this);
> +
> +     return 0;
>  }
>
>  struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
> --
> 1.9.1
>
Acked-by: Huang Shijie <shijie.huang@arm.com>
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  reply	other threads:[~2015-12-17  2:10 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-02 22:47 [PATCH v8 0/7] mtd: nand: gpmi: gpmi-nand DSM and bitflip support Han Xu
2015-12-02 22:47 ` [PATCH v8 1/7] mtd: nand: gpmi: add gpmi dsm supend/resume support Han Xu
2016-01-23 22:54   ` Brian Norris
2015-12-02 22:47 ` [PATCH v8 2/7] dmaengine: mxs: APBH DMA supports deep sleep mode Han Xu
2015-12-05 11:10   ` Vinod Koul
2015-12-02 22:47 ` [PATCH v8 3/7] dmaengine: mxs: add i.MX7D APBH DMA support Han Xu
2015-12-05 11:12   ` Vinod Koul
2015-12-02 22:47 ` [PATCH v8 4/7] mtd: nand: gpmi: may use minimum required ecc for 744 oobsize NAND Han Xu
2015-12-17  2:10   ` Huang Shijie [this message]
2016-01-23 22:56   ` Brian Norris
2015-12-02 22:47 ` [PATCH v8 5/7] mtd: nand: gpmi: add GPMI NAND support for i.MX7D Han Xu
2015-12-17  2:12   ` Huang Shijie
2016-01-23 22:58   ` Brian Norris
2015-12-02 22:47 ` [PATCH v8 6/7] mtd: nand: gpmi: correct bitflip for erased NAND page Han Xu
2015-12-17  2:11   ` Huang Shijie
2016-01-23 23:01   ` Brian Norris
2016-02-02 13:28     ` Markus Pargmann
2016-02-17 22:36       ` Han Xu
2015-12-02 22:47 ` [PATCH v8 7/7] mtd: nand: gpmi: support NAND on i.MX6UL Han Xu
2015-12-17  2:07   ` Huang Shijie
2016-01-23 23:03   ` Brian Norris

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