From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752149AbcAFN2n (ORCPT ); Wed, 6 Jan 2016 08:28:43 -0500 Received: from mail.kernel.org ([198.145.29.136]:41060 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751403AbcAFN2k (ORCPT ); Wed, 6 Jan 2016 08:28:40 -0500 Date: Wed, 6 Jan 2016 07:28:35 -0600 From: Rob Herring To: Kishon Vijay Abraham I Cc: Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, rogerq@ti.com, nsekhar@ti.com Subject: Re: [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie phy Message-ID: <20160106132835.GA20318@rob-hp-laptop> References: <1452077948-26232-1-git-send-email-kishon@ti.com> <1452077948-26232-3-git-send-email-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1452077948-26232-3-git-send-email-kishon@ti.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 06, 2016 at 04:29:08PM +0530, Kishon Vijay Abraham I wrote: > DRA72 uses USB3 PHY for the 2nd lane of PCIE. The configuration > required to make USB3 PHY used for the 2nd lane of PCIe is done > here. > > Signed-off-by: Kishon Vijay Abraham I > --- > Documentation/devicetree/bindings/phy/ti-phy.txt | 2 ++ > drivers/phy/phy-ti-pipe3.c | 30 +++++++++++++++++++++- > 2 files changed, 31 insertions(+), 1 deletion(-) Acked-by: Rob Herring