From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751515AbcAMP0H (ORCPT ); Wed, 13 Jan 2016 10:26:07 -0500 Received: from mail-bl2nam02on0049.outbound.protection.outlook.com ([104.47.38.49]:61728 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751074AbcAMP0D (ORCPT ); Wed, 13 Jan 2016 10:26:03 -0500 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; Date: Wed, 13 Jan 2016 07:25:38 -0800 From: =?utf-8?B?U8O2cmVu?= Brinkmann To: Subbaraya Sundeep Bhatta CC: , , , , , , Subbaraya Sundeep Bhatta Subject: Re: [PATCH 1/2] phy: zynqmp: Add dt bindings for ZynqMP PHY. Message-ID: <20160113152538.GK6491@xsjsorenbubuntu> References: <1452676943-18931-1-git-send-email-sbhatta@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1452676943-18931-1-git-send-email-sbhatta@xilinx.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22060.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(24454002)(164054003)(377424004)(189002)(199003)(106466001)(63266004)(57986006)(23676002)(586003)(47776003)(33716001)(189998001)(76506005)(4001350100001)(2950100001)(36386004)(2906002)(575784001)(107886002)(1220700001)(92566002)(86362001)(81156007)(11100500001)(87936001)(5001960100002)(4001450100002)(1096002)(5008740100001)(33656002)(83506001)(54356999)(19580405001)(110136002)(77096005)(50466002)(1076002)(4326007)(4001430100002)(76176999)(6806005)(50986999)(85182001)(19580395003)(85202003)(107986001)(5001870100001);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1NAM02HT060;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;PTR:unknown-60-100.xilinx.com,xapps1.xilinx.com;MX:1;A:1;LANG:en; X-MS-Office365-Filtering-Correlation-Id: 2ead18c8-bcab-4d0e-957e-08d31c2dd7a5 X-Exchange-Antispam-Report-Test: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:CY1NAM02HT060;UriScan:(192813158149592); X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(8121501046)(13015025)(5005006)(13018025)(520078)(13017025)(10201501046)(3002001);SRVR:CY1NAM02HT060;BCL:0;PCL:0;RULEID:;SRVR:CY1NAM02HT060; X-Forefront-PRVS: 08200063E9 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2016 15:26:00.2212 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1NAM02HT060 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2016-01-13 at 02:52PM +0530, Subbaraya Sundeep Bhatta wrote: > This patch adds the document describing dt bindings for ZynqMP > PHY. ZynqMP SOC has a High Speed Processing System Gigabit > Transceiver which provides PHY capabilties to USB, SATA, > PCIE, Display Port and Ehernet SGMII controllers. > > Signed-off-by: Subbaraya Sundeep Bhatta > --- > .../devicetree/bindings/phy/phy-zynqmp.txt | 104 +++++++++++++++++++++ > 1 file changed, 104 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/phy-zynqmp.txt > > diff --git a/Documentation/devicetree/bindings/phy/phy-zynqmp.txt b/Documentation/devicetree/bindings/phy/phy-zynqmp.txt > new file mode 100644 > index 0000000..ec0d3de > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/phy-zynqmp.txt > @@ -0,0 +1,104 @@ > +Xilinx ZynqMP PHY binding > + > +This binding describes a ZynqMP PHY device that is used to control ZynqMP > +High Speed Gigabit Transceiver(GT). ZynqMP PS GTR provides four lanes > +and are used by USB, SATA, PCIE, Display port and Ethernet SGMMI controllers. > + > +Required properties (controller (parent) node): > +- compatible : Should be "xlnx,zynqmp-psgtr" > + > +- reg : Address and length of register sets for each device in > + "reg-names" > +- reg-names : The names of the register addresses corresponding to the > + registers filled in "reg": > + - serdes: SERDES block register set > + - siou: SIOU block register set > + - lpd: Low power domain peripherals reset control > + - fpd: Full power domain peripherals reset control Reset registers should not be directly modifiable by Linux. This is likely to need a reset controller that uses FW to control eligible resets. > + > +-xlnx,tx_termination_fix: Include fix for a functional issue in the GT. The TX > + termination resistance can be out of spec due to a > + bug in the calibration logic. This issue will be fixed > + in silicon in future versions. Isn't the silicon version run-time detectable? This property may not be needed. Thanks, Sören