From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755240AbcANWh6 (ORCPT ); Thu, 14 Jan 2016 17:37:58 -0500 Received: from mail.skyhub.de ([78.46.96.112]:41630 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753992AbcANWh4 (ORCPT ); Thu, 14 Jan 2016 17:37:56 -0500 Date: Thu, 14 Jan 2016 23:37:39 +0100 From: Borislav Petkov To: Aravind Gopalakrishnan Cc: tony.luck@intel.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank Message-ID: <20160114223739.GJ19941@pd.tnic> References: <1452809140-3328-1-git-send-email-Aravind.Gopalakrishnan@amd.com> <1452809140-3328-4-git-send-email-Aravind.Gopalakrishnan@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1452809140-3328-4-git-send-email-Aravind.Gopalakrishnan@amd.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jan 14, 2016 at 04:05:38PM -0600, Aravind Gopalakrishnan wrote: > From Fam17h onwards, the number of extended MISC register > blocks is reduced to 4. It is an architectural change > from what we had on earlier processors. > > Changing the value of NRBLOCKS here to reflect that change. > > Although theoritically the total number of extended MCx_MISC > registers was 8 in earlier processor families, in practice > we only had to use the extra registers for MC4. And only 2 of > those were used. So this change does not affect older processors. > Tested it on Fam10h, Fam15h systems and works fine. > > Signed-off-by: Aravind Gopalakrishnan > --- > arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c > index da570a8..e650fdc 100644 > --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c > +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c > @@ -28,7 +28,7 @@ > #include > #include > > -#define NR_BLOCKS 9 > +#define NR_BLOCKS 5 This doesn't look necessary to me. We do check MCi_MISC[BlkPtr] before accessing that MSR. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply.