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Date: Mon, 25 Jan 2016 13:24:15 +0100
From: Thierry Reding <thierry.reding@gmail.com>
To: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org,
        Alexandre Courbot <gnurou@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
        Stephen Warren <swarren@wwwdotorg.org>,
        Mikko Perttunen <mikko.perttunen@kapsi.fi>,
        linux-kernel@vger.kernel.org, Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Subject: Re: [PATCH] ARM: tegra: remove redundant ARM_L1_CACHE_SHIFT_6 select
Message-ID: <20160125122415.GB20452@ulmo.nvidia.com>
References: <1453539330-11903-1-git-send-email-yamada.masahiro@socionext.com>
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On Sat, Jan 23, 2016 at 05:55:30PM +0900, Masahiro Yamada wrote:
> These two are both ARMv7 SoCs.  They need not explicitly select
> ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7.
>=20
> Refer to commit a092f2b15399 ("ARM: 7291/1: cache: assume 64-byte L1
> cachelines for ARMv7 CPUs").
>=20
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
>=20
>  drivers/soc/tegra/Kconfig | 2 --
>  1 file changed, 2 deletions(-)

Applied, thanks.

Thierry

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