From: Peter Zijlstra <peterz@infradead.org>
To: Waiman Long <waiman.long@hpe.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Alexander Viro <viro@zeniv.linux.org.uk>,
linux-fsdevel@vger.kernel.org, x86@kernel.org,
linux-kernel@vger.kernel.org,
Scott J Norton <scott.norton@hp.com>,
Douglas Hatch <doug.hatch@hp.com>
Subject: Re: [RFC PATCH 1/3] lib/list_batch: A simple list insertion/deletion batching facility
Date: Wed, 27 Jan 2016 21:54:00 +0100 [thread overview]
Message-ID: <20160127205400.GZ6357@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <56A926FB.80609@hpe.com>
On Wed, Jan 27, 2016 at 03:22:19PM -0500, Waiman Long wrote:
> >>+ /*
> >>+ * Put itself into the list_batch queue
> >>+ */
> >>+ node.next = NULL;
> >>+ node.entry = entry;
> >>+ node.cmd = cmd;
> >>+ node.state = lb_state_waiting;
> >>+
> >Here we rely on the release barrier implied by xchg() to ensure the node
> >initialization is complete before the xchg() publishes the thing.
> >
> >But do we also need the acquire part of this barrier? From what I could
> >tell, the primitive as a whole does not imply any ordering.
>
> I think we probably won't need the acquire part, but I don't have a non-x86
> machine that can really test out the more relaxed versions of the atomic
> ops. That is why I use the strict versions. We can always relax it later on
> with additional patches.
Yeah, I have no hardware either. But at least we should comment the bits
we do know to rely upon.
> >>+ if (!next) {
> >>+ /*
> >>+ * The queue tail should equal to nptr, so clear it to
> >>+ * mark the queue as empty.
> >>+ */
> >>+ if (cmpxchg(&batch->tail, nptr, NULL) != nptr) {
> >>+ /*
> >>+ * Queue not empty, wait until the next pointer is
> >>+ * initialized.
> >>+ */
> >>+ while (!(next = READ_ONCE(nptr->next)))
> >>+ cpu_relax();
> >>+ }
> >>+ /* The above cmpxchg acts as a memory barrier */
> >for what? :-)
> >
> >Also, if that cmpxchg() fails, it very much does _not_ act as one.
> >
> >I suspect you want smp_store_release() setting the state_done, just as
> >above, and then use cmpxchg_relaxed().
>
> You are right. I did forgot about there was no memory barrier guarantee when
> cmpxchg() fails.
> However, in that case, the READ_ONCE() and WRITE_ONCE()
> macros should still provide the necessary ordering, IMO.
READ/WRITE_ONCE() provide _no_ order what so ever. And the issue here is
that we must not do any other stores to nptr after the state_done.
> I can certainly
> change it to use cmpxchg_relaxed() and smp_store_release() instead.
That seems a safe combination and would still generate the exact same
code on x86.
next prev parent reply other threads:[~2016-01-27 20:54 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-26 16:03 [RFC PATCH 0/3] " Waiman Long
2016-01-26 16:03 ` [RFC PATCH 1/3] " Waiman Long
2016-01-27 16:34 ` Peter Zijlstra
2016-01-27 20:22 ` Waiman Long
2016-01-27 20:54 ` Peter Zijlstra [this message]
2016-01-28 16:45 ` Waiman Long
2016-01-28 18:35 ` Peter Zijlstra
2016-01-26 16:03 ` [RFC PATCH 2/3] lib/list_batch, x86: Enable list insertion/deletion batching in x86-64 Waiman Long
2016-01-26 21:44 ` Andi Kleen
2016-01-27 16:38 ` Peter Zijlstra
2016-01-27 20:34 ` Waiman Long
2016-01-26 16:03 ` [RFC PATCH 3/3] vfs: Enable list batching for the superblock's inode list Waiman Long
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