From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932660AbcBJKNw (ORCPT ); Wed, 10 Feb 2016 05:13:52 -0500 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:43488 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932448AbcBJKNr (ORCPT ); Wed, 10 Feb 2016 05:13:47 -0500 Date: Wed, 10 Feb 2016 10:13:40 +0000 From: Mark Brown To: Lina Iyer Cc: Georgi Djakov , lgirdwood@gmail.com, andy.gross@linaro.org, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Message-ID: <20160210101340.GU13270@sirena.org.uk> References: <1455023549-30836-1-git-send-email-georgi.djakov@linaro.org> <20160209222154.GB1646@linaro.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="Y2illNFYgwJwqOHD" Content-Disposition: inline In-Reply-To: <20160209222154.GB1646@linaro.org> X-Cookie: Nothing happens. User-Agent: Mutt/1.5.24 (2015-08-30) X-SA-Exim-Connect-IP: 2a01:348:6:8808:fab::3 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Re: [PATCH v4] regulator: qcom-saw: Add support for SAW regulators X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --Y2illNFYgwJwqOHD Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Feb 09, 2016 at 03:21:54PM -0700, Lina Iyer wrote: > On Tue, Feb 09 2016 at 06:13 -0700, Georgi Djakov wrote: Please delete unneeded context from mails when replying. Doing this makes it much easier to find your reply in the message, helping ensure it won't be missed by people scrolling through the irrelevant quoted material. > >+#define SPM_REG_STS_1 0x10 > >+#define SPM_REG_VCTL 0x14 > >+#define SPM_REG_PMIC_DATA_0 0x28 > >+#define SPM_REG_PMIC_DATA_1 0x2c > >+#define SPM_REG_RST 0x30 > These register offsets are SoC specific. You may want to follow the model > of drivers/soc/qcom/spm.c in getting register offsets. > While I see that you are only supporting APQ8064 with this patch, you > probably would want to think a bit far ahead. To support any other QCOM > SoC, you would need extensive changes. This has already been applied. It's not immediately clear to me that changes simply to move the registers around would be more extensive than just adding fields to the driver data, is it more than just that? --Y2illNFYgwJwqOHD Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAEBCAAGBQJWuw1SAAoJECTWi3JdVIfQDV4H/210UhAM3O9zVX/DYYEYoXFA B/ofYt8X2oQRzrDJhKxzXEXS2xbDkykorPMdmnQHVd2nIlbfH4fQZLPVmz1vWZJT V4dQ/HexppV3dkjkMTKJRqudCLBBUKM4l7v6JGHJWfqBNhXWKtORPFwDbvNhwhe1 zbr+UTIkl2ryOxj2B3cHCMjf0X1ytIrpDRcinY1s20lKUv8bff5sp0rymjuzEjvj sibPndyWIenSu8En4SdWCZkVjqIIlIlKXfyV+eS5Ctyl0tRt32Fedw7aGfFNZe82 oYK7WnPzQRfdDExDNf5BBmJvykhlhQB9Z/hYAyyJYcBTqip8Jzm8/1RC8iXHvT4= =X2Oj -----END PGP SIGNATURE----- --Y2illNFYgwJwqOHD--